From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.90164.1673623849597548955 for ; Fri, 13 Jan 2023 07:30:49 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=kcnLT8QU; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: jiaxin.wu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673623849; x=1705159849; h=from:to:subject:date:message-id; bh=d+VpYwGL1MEN9BLmh+cbpiwg3v3xxdeEWDqS7kxfkmM=; b=kcnLT8QU3U14m04XcXYkgKIUg0BYAU1Z4UxkR4CWxW0ikiEeAOroXAS4 zNy5CLxMwsyVWT1ulZAxlYH4KqOtmdq/oS9m10foWzuQTyLE9beui23LS muNDZavG69n8Q2werib8SypxAFPRyhCj+2O9zRmlmL7G6C0lmlN/BHW2E 0srLpp7w8jVZ8xUVRsBfCWIGhv6Z4vbfRVrhAcml3qwtwOczaZA1ivefc EecVQjsi5d2dadn9O5mlvpX8scWBzQhjMGbnrHbQJ2FcljIZi0sPZgezC lUxIMDZC2dPEm/qavSX+7aPWyCfFzqMhyeYZcnTz0yQTNeQte5QkGUJZj A==; X-IronPort-AV: E=McAfee;i="6500,9779,10589"; a="410251774" X-IronPort-AV: E=Sophos;i="5.97,214,1669104000"; d="scan'208";a="410251774" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2023 07:30:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10589"; a="782182311" X-IronPort-AV: E=Sophos;i="5.97,214,1669104000"; d="scan'208";a="782182311" Received: from sh1gapp1009.ccr.corp.intel.com ([10.239.189.79]) by orsmga004.jf.intel.com with ESMTP; 13 Jan 2023 07:30:47 -0800 From: "Wu, Jiaxin" To: devel@edk2.groups.io Subject: [PATCH v2 0/4] Simplify SMM Relocated Process Date: Fri, 13 Jan 2023 23:30:41 +0800 Message-Id: <20230113153045.13060-1-jiaxin.wu@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 The default SMBASE for the x86 processor is 0x30000. When SMI happens, CPU runs the SMI handler at SMBASE+0x8000. Also, the SMM save state area is within SMBASE+0x10000. One of the SMM initialization from CPU perspective is to program the new SMBASE (in TSEG range) for each CPU thread. When the SMBASE relocated happens in one PEI module ahead of the PiSmmCpuDxeSmm, the PEI module shall produce the SMM_BASE_HOB in HOB database which tells the PiSmmCpuDxeSmm driver which runs at a later phase about the new SMBASE for each CPU thread. PiSmmCpuDxeSmm driver shall install the SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for CPU thread Index. When the HOB doesn't exist, PiSmmCpuDxeSmm driver shall program the new SMBASE itself. Those patches add the SMM Base HOB, which can be produced by any PEI module to do the SmBase relocation ahead of PiSmmCpuDxeSmm driver and store the relocated SmBase address in array for reach Processors. PiSmmCpuDxeSmm and SmmCpuFeaturesLib will consume the HOB to simplify SMM relocation process. With SMM Base Hob, PiSmmCpuDxeSmm does not need the RSM instruction to reload the SMBASE register with the new allocated SMBASE each time when it exits SMM. SMBASE Register for each processors have already been programmed and all SMBASE address have recorded in SMM Base Hob. So the same default SMBASE Address (0x30000) will not be used, thus the CPUs over-writing each other's SMM Save State Area will not happen. This way makes the first SMI init can be executed in parallel and save boot time on multi-core system. Jiaxin Wu (4): UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB Data UefiCpuPkg/PiSmmCpuDxeSmm: Consume SMM Base Hob for SmBase info UefiCpuPkg/SmmCpuFeaturesLib: Skip to configure SMBASE OvmfPkg/SmmCpuFeaturesLib: Skip to configure SMBASE .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 37 ++++- .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 + UefiCpuPkg/Include/Guid/SmmBaseHob.h | 49 ++++++ .../Library/SmmCpuFeaturesLib/CpuFeaturesLib.h | 2 + .../SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c | 23 ++- .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 + .../SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 1 + UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 1 - .../StandaloneMmCpuFeaturesLib.inf | 4 + UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 21 ++- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 29 +++- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 185 ++++++++++++++++----- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 31 +++- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 + UefiCpuPkg/UefiCpuPkg.dec | 3 + 15 files changed, 332 insertions(+), 63 deletions(-) create mode 100644 UefiCpuPkg/Include/Guid/SmmBaseHob.h -- 2.16.2.windows.1