From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web10.195191.1673960148469295247 for ; Tue, 17 Jan 2023 04:55:49 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from loongson.cn (unknown [10.2.9.245]) by gateway (Coremail) with SMTP id _____8Bxa+rTmsZjQRkCAA--.6334S3; Tue, 17 Jan 2023 20:55:47 +0800 (CST) Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxjb7KmsZjEMYaAA--.55077S4; Tue, 17 Jan 2023 20:55:47 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu Subject: [PATCH v1 2/2] MdePkg: Added serveral tables to MATD used by LoongArch64 Date: Tue, 17 Jan 2023 20:55:38 +0800 Message-Id: <20230117125538.4172645-3-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20230117125538.4172645-1-lichao@loongson.cn> References: <20230117125538.4172645-1-lichao@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Bxjb7KmsZjEMYaAA--.55077S4 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAOCGPGj+0AFgAPsZ X-Coremail-Antispam: 1Uk129KBjvJXoWxurW5Jr1Duw4DZw4xZF17GFg_yoW5try3pr s8uay2qa1jqFn7Jw4jqF43Kw4fWFsayw18Janaqwn8WFyUtrWkW3Z8Kr4rtFWFyFW0q34j vFWqq347u3WDGrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b0AFc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x 0267AKxVWxJr0_GcWle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE 44I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E74AGY7Cv6cx26rWlOx8S6xCaFVCjc4 AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7VAKI48JMxAIw28IcVCjz48v1sIE Y20_WwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E74 80Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0 I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04 k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7Cj xVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0zRVWlkUUUUU= Content-Transfer-Encoding: 8bit Add CORE_PIC, LIO_PIC, HT_PIC, EIO_PIC, MSI_PIC, BIO_PIC and LPC_PIC tables for LoongArch64 as defined in ACPI SPEC 6.5. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4306 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li --- MdePkg/Include/IndustryStandard/Acpi65.h | 95 +++++++++++++++++++++++- 1 file changed, 94 insertions(+), 1 deletion(-) diff --git a/MdePkg/Include/IndustryStandard/Acpi65.h b/MdePkg/Include/IndustryStandard/Acpi65.h index fdca5316a9..1e41ae9a27 100644 --- a/MdePkg/Include/IndustryStandard/Acpi65.h +++ b/MdePkg/Include/IndustryStandard/Acpi65.h @@ -303,7 +303,7 @@ typedef struct { // // Multiple APIC Description Table APIC structure types -// All other values between 0x10 and 0x7F are reserved and +// All other values between 0x18 and 0x7F are reserved and // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. // #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC 0x00 @@ -323,6 +323,13 @@ typedef struct { #define EFI_ACPI_6_5_GICR 0x0E #define EFI_ACPI_6_5_GIC_ITS 0x0F #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP 0x10 +#define EFI_ACPI_6_5_CORE_PIC 0x11 +#define EFI_ACPI_6_5_LIO_PIC 0x12 +#define EFI_ACPI_6_5_HT_PIC 0x13 +#define EFI_ACPI_6_5_EIO_PIC 0x14 +#define EFI_ACPI_6_5_MSI_PIC 0x15 +#define EFI_ACPI_6_5_BIO_PIC 0x16 +#define EFI_ACPI_6_5_LPC_PIC 0x17 // // APIC Structure Definitions @@ -617,6 +624,92 @@ typedef struct { #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001 +/// +/// Core Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT32 ProcessorId; + UINT32 CoreId; + UINT32 Flags; +} EFI_ACPI_6_5_CORE_PIC_STRUCTURE; + +/// +/// Legacy I/O Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT8 Cascade[2]; + UINT32 CascadeMap[2]; +} EFI_ACPI_6_5_LIO_PIC_STRUCTURE; + +/// +/// HyperTransport Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT8 Cascade[8]; +} EFI_ACPI_6_5_HT_PIC_STRUCTURE; + +/// +/// Extend I/O Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT8 Cascade; + UINT8 Node; + UINT64 NodeMap; +} EFI_ACPI_6_5_EIO_PIC_STRUCTURE; + +/// +/// MSI Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 MsgAddress; + UINT32 Start; + UINT32 Count; +} EFI_ACPI_6_5_MSI_PIC_STRUCTURE; + +/// +/// Bridge I/O Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT16 Id; + UINT16 GsiBase; +} EFI_ACPI_6_5_BIO_PIC_STRUCTURE; + +/// +/// Low Pin Count Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT8 Cascade; +} EFI_ACPI_6_5_LPC_PIC_STRUCTURE; + /// /// Smart Battery Description Table (SBST) /// -- 2.27.0