From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web11.11831.1674035783379019296 for ; Wed, 18 Jan 2023 01:56:23 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=RB7qU4ww; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: jiaxin.wu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674035783; x=1705571783; h=from:to:subject:date:message-id; bh=rdpcdXpYMjHr10ioTNX0mCyVXCfh55EnZUXSNj88Wxs=; b=RB7qU4wwmOTr/QlyEXvJyXI1Vb/IWaoNQYmAu55q/Z8U/WDchydjPf7O 0Pnuin7dCHMhwjTwU5fJG8/wuks/2Uf7xhtF9mxF23wLxifaKHUGZyDIx +4kIlibM+9CtPPzAdUC5RVtzB3/30O1K2qwqS/5hO5Wtz3G4B62AYVRbF +W8cGJnG+C55fcAe79zWKQsHpH0Q8aAjDoGDrhipPhyjDdFjswId0wLbx z4DzIaapfeG0hCKdA0jOtiFG6BShvT9+Js8eodLfPcYJ9sFnF0OFT2Mhv 0/OCUcj3iL2OGOuq31beGUiZu65m/onZ2faffNFOEZD7mdRbDfjpai6X0 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10593"; a="411184025" X-IronPort-AV: E=Sophos;i="5.97,224,1669104000"; d="scan'208";a="411184025" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jan 2023 01:56:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10593"; a="723026281" X-IronPort-AV: E=Sophos;i="5.97,224,1669104000"; d="scan'208";a="723026281" Received: from sh1gapp1009.ccr.corp.intel.com ([10.239.189.79]) by fmsmga008.fm.intel.com with ESMTP; 18 Jan 2023 01:56:22 -0800 From: "Wu, Jiaxin" To: devel@edk2.groups.io Subject: [PATCH v3 0/5] Simplify SMM Relocation Process Date: Wed, 18 Jan 2023 17:56:15 +0800 Message-Id: <20230118095620.9860-1-jiaxin.wu@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 The default SMBASE for the x86 processor is 0x30000. When SMI happens, CPU runs the SMI handler at SMBASE+0x8000. Also, the SMM save state area is within SMBASE+0x10000. One of the SMM initialization from CPU perspective is to relocate and program the new SMBASE (in TSEG range) for each CPU thread. When the SMBASE relocation happens in a PEI module, the PEI module shall produce the SMM_BASE_HOB in HOB database which tells the PiSmmCpuDxeSmm driver (runs at a later phase) about the new SMBASE for each CPU thread. PiSmmCpuDxeSmm driver installs the SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for CPU thread Index. When the HOB doesn't exist, PiSmmCpuDxeSmm driver shall relocate and program the new SMBASE itself. Those patches add the SMM Base HOB, which can be produced by any PEI module to do the SmBase relocation ahead of PiSmmCpuDxeSmm driver and store the relocated SmBase address in array for reach Processors. PiSmmCpuDxeSmm and SmmCpuFeaturesLib will consume the HOB to simplify SMM relocation process. With SMM Base Hob, PiSmmCpuDxeSmm does not need the RSM instruction to reload the SMBASE register with the new allocated SMBASE each time when it exits SMM. SMBASE Register for each processors have already been programmed and all SMBASE address have recorded in SMM Base Hob. So the same default SMBASE Address (0x30000) will not be used, thus the CPUs over-writing each other's SMM Save State Area will not happen in PiSmmCpuDxeSmm driver. This way makes the first SMI init can be executed in parallel and save boot time on multi-core system. Jiaxin Wu (5): UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB Data UefiCpuPkg/PiSmmCpuDxeSmm: Fix invalid InitializeMpSyncData call UefiCpuPkg/PiSmmCpuDxeSmm: Consume SMM Base Hob for SmBase info UefiCpuPkg/SmmCpuFeaturesLib: Skip SMBASE configuration OvmfPkg/SmmCpuFeaturesLib: Skip SMBASE configuration .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 37 ++++- .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 + UefiCpuPkg/Include/Guid/SmmBaseHob.h | 46 ++++++ .../Library/SmmCpuFeaturesLib/CpuFeaturesLib.h | 2 + .../SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c | 23 ++- .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 + .../SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 1 + UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 1 - .../StandaloneMmCpuFeaturesLib.inf | 4 + UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 29 +++- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 23 +++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 184 ++++++++++++++++----- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 24 +++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 + UefiCpuPkg/UefiCpuPkg.dec | 3 + 15 files changed, 329 insertions(+), 57 deletions(-) create mode 100644 UefiCpuPkg/Include/Guid/SmmBaseHob.h -- 2.16.2.windows.1