Re: [PATCH v3 3/5] UefiCpuPkg/PiSmmCpuDxeSmm: Consume SMM Base Hob for SmBase info

["Gerd Hoffmann" <kraxel@redhat.com>]

> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> index f723b1d253..a39d8528db 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> @@ -57,11 +57,10 @@ SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate = &mSmmCpuPrivateData;
>  
>  //
>  // SMM Relocation variables
>  //
>  volatile BOOLEAN  *mRebased;
> -volatile BOOLEAN  mIsBsp;

> +UINT32   mBspApicId       = 0;

This should be moved to a separate patch with commit message explaining
the reasons for the change.  My guess would be this is required to allow
processors running SmmInitHandler in parallel.

Why mIsBsp is removed but mRebased is not?

> -  // Allocate buffer for all of the tiles.
> +  // Check whether the Required TileSize is enough.
>    //
> -  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
> -  // Volume 3C, Section 34.11 SMBASE Relocation
> -  //   For Pentium and Intel486 processors, the SMBASE values must be
> -  //   aligned on a 32-KByte boundary or the processor will enter shutdown
> -  //   state during the execution of a RSM instruction.
> +  if (TileSize > SIZE_8KB) {
> +    DEBUG ((DEBUG_ERROR, "The Range of Smbase in SMRAM is not enough -- Required TileSize = 0x%08x, Actual TileSize = 0x%08x\n", TileSize, SIZE_8KB));
> +    CpuDeadLoop ();
> +    return RETURN_BUFFER_TOO_SMALL;
> +  }

Where does the 8K come from?

This change is not mentioned in the commit message and most likely
should be a separate patch.

take care,
  Gerd