From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f41.google.com (mail-pj1-f41.google.com [209.85.216.41]) by mx.groups.io with SMTP id smtpd.web11.1523.1674933541717108245 for ; Sat, 28 Jan 2023 11:19:01 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=djqwXU1g; spf=pass (domain: ventanamicro.com, ip: 209.85.216.41, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pj1-f41.google.com with SMTP id n20-20020a17090aab9400b00229ca6a4636so11840632pjq.0 for ; Sat, 28 Jan 2023 11:19:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qaG4m2xrRraQzP5jJO3+3VL5L9fkoAMQKfMameDp18o=; b=djqwXU1gAAdL6gdCR0m4ikHQS9SzhSJXgTmlotQ9UGHnWW7X91xANKeKrJyHjF7Rwm u5B1Tvd2Pf0Xgty8CQdSr/G+joEIipDWEhaIa6E6lgHdxM910WBxwilW0a5z0gnYdyg4 IPoEv321ayd8RyYla7eH6G4Cwsqc6nANxmwgZoVBktSnCzMIA+XR2uQYS6cvuATquoQ7 Q64s39/rm1GoSiP8V0dke/rzP/Th51zwCMVwu5PWr7J4f8/1FNl7FP/aTn+MqWRDQG8s 7EuKYl3gn9fRkOHbJKm79h/U8mSaNAFOuv9WCr29gMWeVNRO6RpChPRZb8URBk5wvahy a0lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qaG4m2xrRraQzP5jJO3+3VL5L9fkoAMQKfMameDp18o=; b=ftsJOpO85Ut8sqIf+cwhGwXBhmcX/CkuzFd3fxh9k8UdFVTH8n+u14jR748wUE82jm xWAjKgWh/BY6w/oXNQHGNG+ngDPGD3VqM4qEVckRWRTsBlJciMnezLZCqanXb4SYrqg3 dPjpZbIdLF/t5Gvb+/gQk3iDKdLu8lGO1kBkLmdTs6WDNoRIkJxrHTvrz0IHxtDWDK/x NlksNEe5DGDIgWPRjBTz1LbGhKwLJ0wegRlxNa04IMd1fmpghxSQhgypMZUf8O5dlEnL zpEoAsqPnwXzEpDzqRpMNqwTnHKCyPmXkObcNPn1D3VuHMexhdzknVdjMs6Km01oG4FX MRAQ== X-Gm-Message-State: AO0yUKUsJu1+GgK5qEaSMn5lprMOEjDEpdMt7wiQkEGO9jEvvS40pEvi YRqruXI2QR3/vZrvEomNGPWCjZmN0+8eRsLD X-Google-Smtp-Source: AK7set/xf2wD9Fk2uDhP9uX9yQSh0HKe0KIFXlUaTnKDqOnzsPS+0SMAtBwAbtQxjOFEs4EFF3L+ng== X-Received: by 2002:a17:902:e3cc:b0:196:56a4:426f with SMTP id r12-20020a170902e3cc00b0019656a4426fmr5232279ple.59.1674933540940; Sat, 28 Jan 2023 11:19:00 -0800 (PST) Return-Path: Received: from kerodipc.Dlink ([49.206.11.246]) by smtp.gmail.com with ESMTPSA id n9-20020a1709026a8900b00192d9258532sm139923plk.150.2023.01.28.11.18.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Jan 2023 11:19:00 -0800 (PST) From: "Sunil V L" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Jiewen Yao , Jordan Justen , Gerd Hoffmann , Abner Chang Subject: [edk2-staging/RiscV64QemuVirt PATCH V7 18/20] OvmfPkg/RiscVVirt: Add SEC module Date: Sun, 29 Jan 2023 00:48:05 +0530 Message-Id: <20230128191807.2080547-19-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230128191807.2080547-1-sunilvl@ventanamicro.com> References: <20230128191807.2080547-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the SEC module for RISC-V Qemu virt machine support. It uses the PEI less design. Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Signed-off-by: Sunil V L Acked-by: Abner Chang --- OvmfPkg/RiscVVirt/Sec/SecMain.inf | 66 +++++ OvmfPkg/RiscVVirt/Sec/SecMain.h | 102 ++++++++ OvmfPkg/RiscVVirt/Sec/Cpu.c | 33 +++ OvmfPkg/RiscVVirt/Sec/Memory.c | 263 ++++++++++++++++++++ OvmfPkg/RiscVVirt/Sec/Platform.c | 84 +++++++ OvmfPkg/RiscVVirt/Sec/SecMain.c | 104 ++++++++ OvmfPkg/RiscVVirt/Sec/SecEntry.S | 21 ++ 7 files changed, 673 insertions(+) diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.inf b/OvmfPkg/RiscVVirt/Sec/SecMain.inf new file mode 100644 index 000000000000..aed35d3af596 --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.inf @@ -0,0 +1,66 @@ +## @file +# SEC Driver for RISC-V +# +# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001B + BASE_NAME = SecMainRiscV64 + FILE_GUID = 16740C0A-AA84-4F62-A06D-AE328057AE07 + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + ENTRY_POINT = SecMain + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = RISCV64 +# + +[Sources] + SecEntry.S + SecMain.c + SecMain.h + Cpu.c + Memory.c + Platform.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + OvmfPkg/OvmfPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + PcdLib + IoLib + PeCoffLib + LzmaDecompressLib + RiscVSbiLib + PrePiLib + FdtLib + MemoryAllocationLib + HobLib + +[Ppis] + gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED + gEfiTemporaryRamDonePpiGuid ## PRODUCES + +[Pcd] + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress + +[Guids] + gFdtHobGuid diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.h b/OvmfPkg/RiscVVirt/Sec/SecMain.h new file mode 100644 index 000000000000..83a8058efe40 --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.h @@ -0,0 +1,102 @@ +/** @file + Master header file for SecCore. + + Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef SEC_MAIN_H_ +#define SEC_MAIN_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + Entry point to the C language phase of SEC. After the SEC assembly + code has initialized some temporary memory and set up the stack, + the control is transferred to this function. + + @param SizeOfRam Size of the temporary memory available for use. + @param TempRamBase Base address of temporary ram + @param BootFirmwareVolume Base address of the Boot Firmware Volume. +**/ +VOID +NORETURN +EFIAPI +SecStartup ( + IN UINTN BootHartId, + IN VOID *DeviceTreeAddress + ); + +/** + Auto-generated function that calls the library constructors for all of the module's + dependent libraries. This function must be called by the SEC Core once a stack has + been established. + +**/ +VOID +EFIAPI +ProcessLibraryConstructorList ( + VOID + ); + +/** + Perform Platform PEIM initialization. + + @return EFI_SUCCESS The platform initialized successfully. + @retval Others - As the error code indicates + +**/ +EFI_STATUS +EFIAPI +PlatformPeimInitialization ( + VOID + ); + +/** + Perform Memory PEIM initialization. + + @return EFI_SUCCESS The platform initialized successfully. + @retval Others - As the error code indicates + +**/ +EFI_STATUS +EFIAPI +MemoryPeimInitialization ( + VOID + ); + +/** + Perform CPU PEIM initialization. + + @return EFI_SUCCESS The platform initialized successfully. + @retval Others - As the error code indicates + +**/ +EFI_STATUS +EFIAPI +CpuPeimInitialization ( + VOID + ); + +#endif diff --git a/OvmfPkg/RiscVVirt/Sec/Cpu.c b/OvmfPkg/RiscVVirt/Sec/Cpu.c new file mode 100644 index 000000000000..2c16df697e37 --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/Cpu.c @@ -0,0 +1,33 @@ +/** @file +The library call to pass the device tree to DXE via HOB. + +Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +// +//// The package level header files this module uses +//// +#include + +#include +#include + +/** + Cpu Peim initialization. + +**/ +EFI_STATUS +CpuPeimInitialization ( + VOID + ) +{ + // + // for MMU type >= sv39 + // + BuildCpuHob (56, 32); + + return EFI_SUCCESS; +} diff --git a/OvmfPkg/RiscVVirt/Sec/Memory.c b/OvmfPkg/RiscVVirt/Sec/Memory.c new file mode 100644 index 000000000000..70935b07b56b --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/Memory.c @@ -0,0 +1,263 @@ +/** @file + Memory Detection for Virtual Machines. + + Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+ Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MemDetect.c + +**/ + +// +// The package level header files this module uses +// +#include + +// +// The Library classes this module consumes +// +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +VOID +BuildMemoryTypeInformationHob ( + VOID + ); + +/** + Build reserved memory range resource HOB. + + @param MemoryBase Reserved memory range base address. + @param MemorySize Reserved memory range size. + +**/ +STATIC +VOID +AddReservedMemoryBaseSizeHob ( + EFI_PHYSICAL_ADDRESS MemoryBase, + UINT64 MemorySize + ) +{ + BuildResourceDescriptorHob ( + EFI_RESOURCE_MEMORY_RESERVED, + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED, + MemoryBase, + MemorySize + ); +} + +/** + Create memory range resource HOB using the memory base + address and size. + + @param MemoryBase Memory range base address. + @param MemorySize Memory range size. + +**/ +STATIC +VOID +AddMemoryBaseSizeHob ( + EFI_PHYSICAL_ADDRESS MemoryBase, + UINT64 MemorySize + ) +{ + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED, + MemoryBase, + MemorySize + ); +} + +/** + Create memory range resource HOB using memory base + address and top address of the memory range. + + @param MemoryBase Memory range base address. + @param MemoryLimit Memory range size. + +**/ +STATIC +VOID +AddMemoryRangeHob ( + EFI_PHYSICAL_ADDRESS MemoryBase, + EFI_PHYSICAL_ADDRESS MemoryLimit + ) +{ + AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase)); +} + +/** + Configure MMU +**/ +STATIC +VOID +InitMmu ( + ) +{ + // + // Set supervisor translation mode to Bare mode + // + RiscVSetSupervisorAddressTranslationRegister ((UINT64)SATP_MODE_OFF << 60); + DEBUG ((DEBUG_INFO, "%a: Set Supervisor address mode to bare-metal mode.\n", __FUNCTION__)); +} + +/** + Publish system RAM and reserve memory regions. + +**/ +STATIC +VOID +InitializeRamRegions ( + EFI_PHYSICAL_ADDRESS SystemMemoryBase, + UINT64 SystemMemorySize, + EFI_PHYSICAL_ADDRESS MmodeResvBase, + UINT64 MmodeResvSize + ) +{ + /* + * M-mode FW can be loaded anywhere in memory but should not overlap + * with the EDK2. This can happen if some other boot code loads the + * M-mode firmware. + * + * The M-mode firmware memory should be marked as reserved memory + * so that OS doesn't use it. + */ + DEBUG (( + DEBUG_INFO, + "%a: M-mode FW Memory Start:0x%lx End:0x%lx\n", + __FUNCTION__, + MmodeResvBase, + MmodeResvBase + MmodeResvSize + )); + AddReservedMemoryBaseSizeHob (MmodeResvBase, MmodeResvSize); + + if (MmodeResvBase > SystemMemoryBase) { + AddMemoryRangeHob (SystemMemoryBase, MmodeResvBase); + } + + AddMemoryRangeHob ( + MmodeResvBase + MmodeResvSize, + SystemMemoryBase + SystemMemorySize + ); +} + +/** + Initialize memory hob based on the DTB information. + + @return EFI_SUCCESS The memory hob added successfully. + +**/ +EFI_STATUS +MemoryPeimInitialization ( + VOID + ) +{ + EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext; + CONST UINT64 *RegProp; + CONST CHAR8 *Type; + UINT64 CurBase, CurSize; + INT32 Node, Prev; + INT32 Len; + VOID *FdtPointer; + EFI_PHYSICAL_ADDRESS MmodeResvBase; + UINT64 MmodeResvSize; + + FirmwareContext = NULL; + GetFirmwareContextPointer (&FirmwareContext); + + if (FirmwareContext == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree; + if (FdtPointer == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + /* try to locate the reserved memory opensbi node */ + Node = fdt_path_offset (FdtPointer, "/reserved-memory/mmode_resv0"); + if (Node >= 0) { + RegProp = fdt_getprop (FdtPointer, Node, "reg", &Len); + if ((RegProp != 0) && (Len == (2 * sizeof (UINT64)))) { + MmodeResvBase = fdt64_to_cpu (ReadUnaligned64 (RegProp)); + MmodeResvSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1)); + } + } + + // Look for the lowest memory node + for (Prev = 0; ; Prev = Node) { + Node = fdt_next_node (FdtPointer, Prev, NULL); + if (Node < 0) { + break; + } + + // Check for memory node + Type = fdt_getprop (FdtPointer, Node, "device_type", &Len); + if (Type && (AsciiStrnCmp (Type, "memory", Len) == 0)) { + // Get the 'reg' property of this node. For now, we will assume + // two 8 byte quantities for base and size, respectively. + RegProp = fdt_getprop (FdtPointer, Node, "reg", &Len); + if ((RegProp != 0) && (Len == (2 * sizeof (UINT64)))) { + CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp)); + CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1)); + + DEBUG (( + DEBUG_INFO, + "%a: System RAM @ 0x%lx - 0x%lx\n", + __FUNCTION__, + CurBase, + CurBase + CurSize - 1 + )); + + if ((MmodeResvBase >= CurBase) && ((MmodeResvBase + MmodeResvSize) <= (CurBase + CurSize))) { + InitializeRamRegions ( + CurBase, + CurSize, + MmodeResvBase, + MmodeResvSize + ); + } else { + AddMemoryBaseSizeHob (CurBase, CurSize); + } + } else { + DEBUG (( + DEBUG_ERROR, + "%a: Failed to parse FDT memory node\n", + __FUNCTION__ + )); + } + } + } + + InitMmu (); + + BuildMemoryTypeInformationHob (); + + return EFI_SUCCESS; +} diff --git a/OvmfPkg/RiscVVirt/Sec/Platform.c b/OvmfPkg/RiscVVirt/Sec/Platform.c new file mode 100644 index 000000000000..e8fd126cf800 --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/Platform.c @@ -0,0 +1,84 @@ +/** @file +The library call to pass the device tree to DXE via HOB. + +Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +// +//// The package level header files this module uses +//// +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +/** + @retval EFI_SUCCESS The address of FDT is passed in HOB. + EFI_UNSUPPORTED Can't locate FDT. +**/ +EFI_STATUS +EFIAPI +PlatformPeimInitialization ( + VOID + ) +{ + EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext; + VOID *FdtPointer; + VOID *Base; + VOID *NewBase; + UINTN FdtSize; + UINTN FdtPages; + UINT64 *FdtHobData; + + FirmwareContext = NULL; + GetFirmwareContextPointer (&FirmwareContext); + + if (FirmwareContext == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree; + if (FdtPointer == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + DEBUG ((DEBUG_INFO, "%a: Build FDT HOB - FDT at address: 0x%x \n", __FUNCTION__, FdtPointer)); + Base = FdtPointer; + if (fdt_check_header (Base) != 0) { + DEBUG ((DEBUG_ERROR, "%a: Corrupted DTB\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + FdtSize = fdt_totalsize (Base); + FdtPages = EFI_SIZE_TO_PAGES (FdtSize); + NewBase = AllocatePages (FdtPages); + if (NewBase == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Could not allocate memory for DTB\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages)); + + FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData); + if (FdtHobData == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Could not build FDT Hob\n", __FUNCTION__)); + return EFI_UNSUPPORTED; + } + + *FdtHobData = (UINTN)NewBase; + + BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSize)); + + return EFI_SUCCESS; +} diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.c b/OvmfPkg/RiscVVirt/Sec/SecMain.c new file mode 100644 index 000000000000..054e49ef0c1e --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.c @@ -0,0 +1,104 @@ +/** @file + RISC-V SEC phase module for Qemu Virt. + + Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SecMain.h" + +STATIC +EFI_STATUS +EFIAPI +SecInitializePlatform ( + VOID + ) +{ + EFI_STATUS Status; + + MemoryPeimInitialization (); + + CpuPeimInitialization (); + + // Set the Boot Mode + SetBootMode (BOOT_WITH_FULL_CONFIGURATION); + + Status = PlatformPeimInitialization (); + ASSERT_EFI_ERROR (Status); + + return EFI_SUCCESS; +} + +/** + + Entry point to the C language phase of SEC. After the SEC assembly + code has initialized some temporary memory and set up the stack, + the control is transferred to this function. + + + @param[in] BootHartId Hardware thread ID of boot hart. + @param[in] DeviceTreeAddress Pointer to Device Tree (DTB) +**/ +VOID +NORETURN +EFIAPI +SecStartup ( + IN UINTN BootHartId, + IN VOID *DeviceTreeAddress + ) +{ + EFI_HOB_HANDOFF_INFO_TABLE *HobList; + EFI_RISCV_FIRMWARE_CONTEXT FirmwareContext; + EFI_STATUS Status; + UINT64 UefiMemoryBase; + UINT64 StackBase; + + // + // Report Status Code to indicate entering SEC core + // + DEBUG (( + DEBUG_INFO, + "%a() BootHartId: 0x%x, DeviceTreeAddress=0x%x\n", + __FUNCTION__, + BootHartId, + DeviceTreeAddress + )); + + FirmwareContext.BootHartId = BootHartId; + FirmwareContext.FlattenedDeviceTree = (UINT64)DeviceTreeAddress; + SetFirmwareContextPointer (&FirmwareContext); + + StackBase = (UINT64)FixedPcdGet32 (PcdOvmfSecPeiTempRamBase); + UefiMemoryBase = StackBase + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) - SIZE_32MB; + + // Declare the PI/UEFI memory region + HobList = HobConstructor ( + (VOID *)UefiMemoryBase, + SIZE_32MB, + (VOID *)UefiMemoryBase, + (VOID *)StackBase // The top of the UEFI Memory is reserved for the stacks + ); + PrePeiSetHobList (HobList); + + SecInitializePlatform (); + + // + // Process all libraries constructor function linked to SecMain. + // + ProcessLibraryConstructorList (); + + // Assume the FV that contains the SEC (our code) also contains a compressed FV. + Status = DecompressFirstFv (); + ASSERT_EFI_ERROR (Status); + + // Load the DXE Core and transfer control to it + Status = LoadDxeCoreFromFv (NULL, 0); + ASSERT_EFI_ERROR (Status); + // + // Should not come here. + // + UNREACHABLE (); +} diff --git a/OvmfPkg/RiscVVirt/Sec/SecEntry.S b/OvmfPkg/RiscVVirt/Sec/SecEntry.S new file mode 100644 index 000000000000..e919a3cb0e80 --- /dev/null +++ b/OvmfPkg/RiscVVirt/Sec/SecEntry.S @@ -0,0 +1,21 @@ +/* + Copyright (c) 2022 Ventana Micro Systems Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + */ + +#include "SecMain.h" + +.text +.align 3 + +ASM_FUNC (_ModuleEntryPoint) + /* Use Temp memory as the stack for calling to C code */ + li a4, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + li a5, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) + + /* Use Temp memory as the stack for calling to C code */ + add sp, a4, a5 + + call SecStartup -- 2.38.0