From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.8740.1675204566528414674 for ; Tue, 31 Jan 2023 14:36:06 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=edoi73XG; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 156026173D; Tue, 31 Jan 2023 22:36:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE699C433A0; Tue, 31 Jan 2023 22:36:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675204565; bh=Y2WUkL1DZ6/yc/Iq1XL52ZXKgTM8WHvRpsc7jeIOqxc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=edoi73XGhDZaSJYKBpsZCSbORizubDO6OydWLhd6zkLai2MxmdcaQITp4+w4O5cwO KGT+V7lFHrdN3A0imeOsIRus94tfdlAHZ3rnioxcbbv52tieMIANkGy01MvcypSpXF voXutUPnfBsOmWCZYyGkEkebLMg1EnoGKbSqMXxErzvkfHqh6SWWuX6QLTFYUhxW2N npQ6pH9uaw87AaIyfdtvYXvvWvK5h4d8Ac5jHruck3U2YaqIBDsXWZs5+w1QU766FZ +4zOuKsWlkxJpIC1kX/IW8vUvkZvsJlz9WMhWfXeb25AIAf8szjtY0snyNUc/DJqWm TH9DwzEOTtn7A== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Michael Kinney , Liming Gao , Jiewen Yao , Michael Kubacki , Sean Brogan , Rebecca Cran , Leif Lindholm , Sami Mujawar Subject: [PATCH 3/4] ArmPkg/CpuDxe: Unify PageAttributeToGcdAttribute helper Date: Tue, 31 Jan 2023 23:35:49 +0100 Message-Id: <20230131223550.1775834-4-ardb@kernel.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230131223550.1775834-1-ardb@kernel.org> References: <20230131223550.1775834-1-ardb@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In preparation for introducing an implementation of the EFI memory attributes protocol that is shared between ARM and AArch64, unify the existing code that converts a page table descriptor into a EFI_MEMORY_xxx bitfield, so it can be called from the generic code. Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 5 +-- ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 46 +++++++++++--------- ArmPkg/Drivers/CpuDxe/CpuDxe.h | 5 +++ 3 files changed, 32 insertions(+), 24 deletions(-) diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AA= rch64/Mmu.c index 8bb33046e707..4ec9fc0a582c 100644 --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c @@ -30,13 +30,12 @@ GetRootTranslationTableInfo ( *RootTableEntryCount =3D TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_= LEVEL;=0D }=0D =0D -STATIC=0D UINT64=0D PageAttributeToGcdAttribute (=0D - IN UINT64 PageAttributes=0D + IN UINTN PageAttributes=0D )=0D {=0D - UINT64 GcdAttributes;=0D + UINTN GcdAttributes;=0D =0D switch (PageAttributes & TT_ATTR_INDX_MASK) {=0D case TT_ATTR_INDX_DEVICE_MEMORY:=0D diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mm= u.c index 2daf47ba6fe5..9545a1c1d2d3 100644 --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c @@ -77,39 +77,46 @@ SectionToGcdAttributes ( return EFI_SUCCESS;=0D }=0D =0D -EFI_STATUS=0D -PageToGcdAttributes (=0D - IN UINT32 PageAttributes,=0D - OUT UINT64 *GcdAttributes=0D +UINT64=0D +PageAttributeToGcdAttribute (=0D + IN UINTN PageAttributes=0D )=0D {=0D - *GcdAttributes =3D 0;=0D + UINT64 GcdAttributes;=0D =0D // determine cacheability attributes=0D switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:=0D - *GcdAttributes |=3D EFI_MEMORY_UC;=0D + GcdAttributes =3D EFI_MEMORY_UC;=0D break;=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:=0D - *GcdAttributes |=3D EFI_MEMORY_UC;=0D + GcdAttributes =3D EFI_MEMORY_UC;=0D break;=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:=0D - *GcdAttributes |=3D EFI_MEMORY_WT;=0D + GcdAttributes =3D EFI_MEMORY_WT;=0D break;=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:=0D - *GcdAttributes |=3D EFI_MEMORY_WB;=0D + GcdAttributes =3D EFI_MEMORY_WB;=0D break;=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:=0D - *GcdAttributes |=3D EFI_MEMORY_WC;=0D + GcdAttributes =3D EFI_MEMORY_WC;=0D break;=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:=0D - *GcdAttributes |=3D EFI_MEMORY_WB;=0D + GcdAttributes =3D EFI_MEMORY_WB;=0D break;=0D case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:=0D - *GcdAttributes |=3D EFI_MEMORY_UC;=0D + GcdAttributes =3D EFI_MEMORY_UC;=0D break;=0D default:=0D - return EFI_UNSUPPORTED;=0D + DEBUG ((=0D + DEBUG_ERROR,=0D + "PageAttributeToGcdAttribute: PageAttributes:0x%X not supported.\n= ",=0D + PageAttributes=0D + ));=0D + ASSERT (0);=0D + // The Global Coherency Domain (GCD) value is defined as a bit set.= =0D + // Returning 0 means no attribute has been set.=0D + GcdAttributes =3D 0;=0D }=0D =0D // determine protection attributes=0D @@ -126,7 +133,7 @@ PageToGcdAttributes ( // read only cases map to write-protect=0D case TT_DESCRIPTOR_PAGE_AP_RO_NO:=0D case TT_DESCRIPTOR_PAGE_AP_RO_RO:=0D - *GcdAttributes |=3D EFI_MEMORY_RO;=0D + GcdAttributes |=3D EFI_MEMORY_RO;=0D break;=0D =0D default:=0D @@ -135,10 +142,10 @@ PageToGcdAttributes ( =0D // now process eXectue Never attribute=0D if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) !=3D 0 ) {=0D - *GcdAttributes |=3D EFI_MEMORY_XP;=0D + GcdAttributes |=3D EFI_MEMORY_XP;=0D }=0D =0D - return EFI_SUCCESS;=0D + return GcdAttributes;=0D }=0D =0D EFI_STATUS=0D @@ -152,7 +159,6 @@ SyncCacheConfigPage ( IN OUT UINT32 *NextSectionAttributes=0D )=0D {=0D - EFI_STATUS Status;=0D UINT32 i;=0D volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;=0D UINT32 NextPageAttributes;=0D @@ -183,8 +189,7 @@ SyncCacheConfigPage ( NextPageAttributes =3D PageAttributes;=0D } else if (PageAttributes !=3D NextPageAttributes) {=0D // Convert Section Attributes into GCD Attributes=0D - Status =3D PageToGcdAttributes (NextPageAttributes, &GcdAttributes= );=0D - ASSERT_EFI_ERROR (Status);=0D + GcdAttributes =3D PageAttributeToGcdAttribute (NextPageAttributes)= ;=0D =0D // update GCD with these changes (this will recurse into our own C= puSetMemoryAttributes below which is OK)=0D SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, = *NextRegionBase, *NextRegionLength, GcdAttributes);=0D @@ -196,8 +201,7 @@ SyncCacheConfigPage ( }=0D } else if (NextPageAttributes !=3D 0) {=0D // Convert Page Attributes into GCD Attributes=0D - Status =3D PageToGcdAttributes (NextPageAttributes, &GcdAttributes);= =0D - ASSERT_EFI_ERROR (Status);=0D + GcdAttributes =3D PageAttributeToGcdAttribute (NextPageAttributes);= =0D =0D // update GCD with these changes (this will recurse into our own Cpu= SetMemoryAttributes below which is OK)=0D SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *N= extRegionBase, *NextRegionLength, GcdAttributes);=0D diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h index ff672390ce51..8933fa90c4ed 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.h @@ -126,4 +126,9 @@ SetGcdMemorySpaceAttributes ( IN UINT64 Attributes=0D );=0D =0D +UINT64=0D +PageAttributeToGcdAttribute (=0D + IN UINTN PageAttributes=0D + );=0D +=0D #endif // CPU_DXE_H_=0D --=20 2.39.0