From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.62559.1675709433447496337 for ; Mon, 06 Feb 2023 10:50:33 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=OaQR+Ebe; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: chasel.chiu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675709433; x=1707245433; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=J2/M17+XfcFj7i4zovNLtjGizzwCFu2BznmHcYiWdaE=; b=OaQR+EbeVvQ7DY8l7+fUnyCv0WNXpTFCRHiYG2KtER8JS7VmEkzju58B 6D5H6DF6+MewRWnytvk1uHvLF9NEXg0zMlJR6YEeOPcoOoiaRXz7R4MDD ToAsohuACSWcpELPQz/A42NKz0uFJuj7s4NMyE8XsCAQJ5LgWylkYT8iK WNOG2ciAAZjIzbyQEzgxK7MJTA+l5gt6QoF2ciS+9U9WzqHhe8h7zVTKf OYjOXD3sYY5UUOZ5wHXX8Ymj4OID97U3EWMKCZdDwn3R2JampttjRzt0z e1HwzcrcmTEk0ruJtC9t1EsZV1Bohw/K36B/7+hgSF98YqJwsyOi2tsmz Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10613"; a="312939219" X-IronPort-AV: E=Sophos;i="5.97,276,1669104000"; d="scan'208";a="312939219" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2023 10:50:32 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10613"; a="698943731" X-IronPort-AV: E=Sophos;i="5.97,276,1669104000"; d="scan'208";a="698943731" Received: from cchiu4-mobl.gar.corp.intel.com ([10.209.84.217]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2023 10:50:32 -0800 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Ashraf Ali S , Isaac Oram , Rangasai V Chaganty , Ray Ni , Michael Kubacki Subject: [edk2-platforms: PATCH v2] IntelSiliconPkg/SpiFvbServiceSmm: Rewrite VariableStore header. Date: Mon, 6 Feb 2023 10:50:15 -0800 Message-Id: <20230206185015.1753-1-chasel.chiu@intel.com> X-Mailer: git-send-email 2.35.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable When invalid VariableStore FV header detected, current SpiFvbService will erase both FV and VariableStore headers from flash, however, it will only rewrite FV header back and cause invalid VariableStore header. This patch adding the support for rewriting both FV header and VariableStore header when VariableStore corruption happened. Platform has to set PcdFlashVariableStoreType to inform SpiFvbService which VariableStoreType should be rewritten. Cc: Ashraf Ali S Cc: Isaac Oram Cc: Rangasai V Chaganty Cc: Ray Ni Cc: Michael Kubacki Signed-off-by: Chasel Chiu --- Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.= c | 174 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------= ----------------------------------- Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm= .inf | 4 ++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 8 ++++++++ 3 files changed, 134 insertions(+), 52 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/S= piFvbServiceMm.c index 6b4bcdcfe3..6af2dfac10 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceMm.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceMm.c @@ -12,6 +12,7 @@ #include =0D #include =0D #include =0D +#include =0D =0D /**=0D The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol=0D @@ -25,12 +26,12 @@ **/=0D VOID=0D InstallFvbProtocol (=0D - IN EFI_FVB_INSTANCE *FvbInstance=0D + IN EFI_FVB_INSTANCE *FvbInstance=0D )=0D {=0D - EFI_FIRMWARE_VOLUME_HEADER *FvHeader;=0D - EFI_STATUS Status;=0D - EFI_HANDLE FvbHandle;=0D + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;=0D + EFI_STATUS Status;=0D + EFI_HANDLE FvbHandle;=0D =0D ASSERT (FvbInstance !=3D NULL);=0D if (FvbInstance =3D=3D NULL) {=0D @@ -52,19 +53,21 @@ InstallFvbProtocol ( //=0D // FV does not contains extension header, then produce MEMMAP_DEVICE_P= ATH=0D //=0D - FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRunti= meCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);= =0D + FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *)AllocateRuntim= eCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);=0D if (FvbInstance->DevicePath =3D=3D NULL) {=0D DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMA= P_DEVICE_PATH failed\n"));=0D return;=0D }=0D - ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.Sta= rtingAddress =3D FvbInstance->FvBase;=0D - ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.End= ingAddress =3D FvbInstance->FvBase + FvHeader->FvLength - 1;=0D +=0D + ((FV_MEMMAP_DEVICE_PATH *)FvbInstance->DevicePath)->MemMapDevPath.Star= tingAddress =3D FvbInstance->FvBase;=0D + ((FV_MEMMAP_DEVICE_PATH *)FvbInstance->DevicePath)->MemMapDevPath.Endi= ngAddress =3D FvbInstance->FvBase + FvHeader->FvLength - 1;=0D } else {=0D - FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRunti= meCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);=0D + FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *)AllocateRuntim= eCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);=0D if (FvbInstance->DevicePath =3D=3D NULL) {=0D DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PI= WG_DEVICE_PATH failed\n"));=0D return;=0D }=0D +=0D CopyGuid (=0D &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName,= =0D (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)=0D @@ -103,17 +106,21 @@ FvbInitialize ( VOID=0D )=0D {=0D - EFI_FVB_INSTANCE *FvbInstance;=0D - EFI_FIRMWARE_VOLUME_HEADER *FvHeader;=0D - EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;=0D - EFI_PHYSICAL_ADDRESS BaseAddress;=0D - EFI_STATUS Status;=0D - UINTN BufferSize;=0D - UINTN Idx;=0D - UINT32 MaxLbaSize;=0D - UINT32 BytesWritten;=0D - UINTN BytesErased;=0D - UINT64 NvStorageFvSize;=0D + EFI_FVB_INSTANCE *FvbInstance;=0D + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;=0D + EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;=0D + EFI_PHYSICAL_ADDRESS BaseAddress;=0D + EFI_STATUS Status;=0D + UINTN BufferSize;=0D + UINTN Idx;=0D + UINT32 MaxLbaSize;=0D + UINT32 BytesWritten;=0D + UINTN BytesErased;=0D + UINT64 NvStorageFvSize;=0D + UINT32 ExpectedBytesWritten;=0D + VARIABLE_STORE_HEADER *VariableStoreHeader;=0D + UINT8 VariableStoreType;=0D + UINT8 *NvStoreBuffer;=0D =0D Status =3D GetVariableFlashNvStorageInfo (&BaseAddress, &NvStorageFvSize= );=0D if (EFI_ERROR (Status)) {=0D @@ -129,6 +136,7 @@ FvbInitialize ( DEBUG ((DEBUG_ERROR, "[%a] - 64-bit variable storage base address not = supported.\n", __FUNCTION__));=0D return;=0D }=0D +=0D Status =3D SafeUint64ToUint32 (NvStorageFvSize, &mPlatformFvBaseAddress[= 0].FvSize);=0D if (EFI_ERROR (Status)) {=0D ASSERT_EFI_ERROR (Status);=0D @@ -136,8 +144,8 @@ FvbInitialize ( return;=0D }=0D =0D - mPlatformFvBaseAddress[1].FvBase =3D PcdGet32(PcdFlashMicrocodeFvBase);= =0D - mPlatformFvBaseAddress[1].FvSize =3D PcdGet32(PcdFlashMicrocodeFvSize);= =0D + mPlatformFvBaseAddress[1].FvBase =3D PcdGet32 (PcdFlashMicrocodeFvBase);= =0D + mPlatformFvBaseAddress[1].FvSize =3D PcdGet32 (PcdFlashMicrocodeFvSize);= =0D =0D //=0D // We will only continue with FVB installation if the=0D @@ -147,17 +155,17 @@ FvbInitialize ( //=0D // Make sure all FVB are valid and/or fix if possible=0D //=0D - for (Idx =3D 0;; Idx++) {=0D - if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) {=0D + for (Idx =3D 0; ; Idx++) {=0D + if ((mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0) && (mPlatformFvBas= eAddress[Idx].FvBase =3D=3D 0)) {=0D break;=0D }=0D =0D BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;=0D - FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;=0D + FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)BaseAddress;=0D =0D if (!IsFvHeaderValid (BaseAddress, FvHeader)) {=0D BytesWritten =3D 0;=0D - BytesErased =3D 0;=0D + BytesErased =3D 0;=0D DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHea= der));=0D FvHeader =3D NULL;=0D Status =3D GetFvbInfo (BaseAddress, &FvHeader);=0D @@ -165,57 +173,116 @@ FvbInitialize ( DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x. = GetFvbInfo Status %r\n", BaseAddress, Status));=0D continue;=0D }=0D +=0D DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\= n", BaseAddress));=0D //=0D // Spi erase=0D //=0D - BytesErased =3D (UINTN) FvHeader->BlockMap->Length;=0D - Status =3D SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);= =0D + BytesErased =3D (UINTN)FvHeader->BlockMap->Length;=0D + Status =3D SpiFlashBlockErase ((UINTN)BaseAddress, &BytesEras= ed);=0D if (EFI_ERROR (Status)) {=0D DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", St= atus));=0D if (FvHeader !=3D NULL) {=0D FreePool (FvHeader);=0D }=0D +=0D continue;=0D }=0D +=0D if (BytesErased !=3D FvHeader->BlockMap->Length) {=0D DEBUG ((DEBUG_WARN, "ERROR - BytesErased !=3D FvHeader->BlockMap= ->Length\n"));=0D DEBUG ((DEBUG_INFO, " BytesErased =3D 0x%X\n Length =3D 0x%X\n",= BytesErased, FvHeader->BlockMap->Length));=0D if (FvHeader !=3D NULL) {=0D FreePool (FvHeader);=0D }=0D +=0D continue;=0D }=0D - BytesWritten =3D FvHeader->HeaderLength;=0D - Status =3D SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT= 8*)FvHeader);=0D +=0D + BytesWritten =3D FvHeader->HeaderLength;=0D + ExpectedBytesWritten =3D BytesWritten;=0D + if (Idx !=3D 0) {=0D + Status =3D SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UI= NT8 *)FvHeader);=0D + } else {=0D + //=0D + // This is Variable Store, rewrite both EFI_FIRMWARE_VOLUME_HEAD= ER and VARIABLE_STORE_HEADER=0D + //=0D + NvStoreBuffer =3D NULL;=0D + NvStoreBuffer =3D AllocateZeroPool (sizeof (VARIABLE_STORE_HEADE= R) + FvHeader->HeaderLength);=0D + if (NvStoreBuffer !=3D NULL) {=0D + //=0D + // Combine FV header and VariableStore header into the buffer.= =0D + //=0D + CopyMem (NvStoreBuffer, FvHeader, FvHeader->HeaderLength);=0D + VariableStoreHeader =3D (VARIABLE_STORE_HEADER *)(NvStoreBuffe= r + FvHeader->HeaderLength);=0D + VariableStoreType =3D PcdGet8 (PcdFlashVariableStoreType);=0D + switch (VariableStoreType) {=0D + case 0:=0D + DEBUG ((DEBUG_ERROR, "Type: gEfiVariableGuid\n"));=0D + CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGu= id);=0D + break;=0D + case 1:=0D + DEBUG ((DEBUG_ERROR, "Type: gEfiAuthenticatedVariableGuid\= n"));=0D + CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthentica= tedVariableGuid);=0D + break;=0D + default:=0D + break;=0D + }=0D +=0D + //=0D + // Initialize common VariableStore header fields=0D + //=0D + VariableStoreHeader->Size =3D PcdGet32 (PcdFlashNvStorage= VariableSize) - FvHeader->HeaderLength;=0D + VariableStoreHeader->Format =3D VARIABLE_STORE_FORMATTED;=0D + VariableStoreHeader->State =3D VARIABLE_STORE_HEALTHY;=0D + VariableStoreHeader->Reserved =3D 0;=0D + VariableStoreHeader->Reserved1 =3D 0;=0D + //=0D + // Write buffer to flash=0D + //=0D + BytesWritten =3D FvHeader->HeaderLength + sizeof (VARI= ABLE_STORE_HEADER);=0D + ExpectedBytesWritten =3D BytesWritten;=0D + Status =3D SpiFlashWrite ((UINTN)BaseAddress, &B= ytesWritten, NvStoreBuffer);=0D + FreePool (NvStoreBuffer);=0D + } else {=0D + Status =3D EFI_OUT_OF_RESOURCES;=0D + }=0D + }=0D +=0D if (EFI_ERROR (Status)) {=0D DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status)= );=0D if (FvHeader !=3D NULL) {=0D FreePool (FvHeader);=0D }=0D +=0D continue;=0D }=0D - if (BytesWritten !=3D FvHeader->HeaderLength) {=0D - DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=3D HeaderLength\n"))= ;=0D - DEBUG ((DEBUG_INFO, " BytesWritten =3D 0x%X\n HeaderLength =3D 0= x%X\n", BytesWritten, FvHeader->HeaderLength));=0D +=0D + if (BytesWritten !=3D ExpectedBytesWritten) {=0D + DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=3D ExpectedBytesWrit= ten\n"));=0D + DEBUG ((DEBUG_INFO, " BytesWritten =3D 0x%X\n ExpectedBytesWritt= en =3D 0x%X\n", BytesWritten, ExpectedBytesWritten));=0D if (FvHeader !=3D NULL) {=0D FreePool (FvHeader);=0D }=0D +=0D continue;=0D }=0D +=0D Status =3D SpiFlashLock ();=0D if (EFI_ERROR (Status)) {=0D DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status))= ;=0D if (FvHeader !=3D NULL) {=0D FreePool (FvHeader);=0D }=0D +=0D continue;=0D }=0D +=0D DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n"= , BaseAddress));=0D //=0D // Clear cache for this range.=0D //=0D - WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, = FvHeader->BlockMap->Length);=0D + WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)BaseAddress, FvH= eader->BlockMap->Length);=0D if (FvHeader !=3D NULL) {=0D FreePool (FvHeader);=0D }=0D @@ -227,11 +294,12 @@ FvbInitialize ( //=0D BufferSize =3D 0;=0D for (Idx =3D 0; ; Idx++) {=0D - if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) {=0D + if ((mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0) && (mPlatformFvBas= eAddress[Idx].FvBase =3D=3D 0)) {=0D break;=0D }=0D +=0D BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;=0D - FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;=0D + FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)BaseAddress;=0D =0D if (!IsFvHeaderValid (BaseAddress, FvHeader)) {=0D DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHead= er));=0D @@ -239,27 +307,28 @@ FvbInitialize ( }=0D =0D BufferSize +=3D (FvHeader->HeaderLength +=0D - sizeof (EFI_FVB_INSTANCE) -=0D - sizeof (EFI_FIRMWARE_VOLUME_HEADER)=0D - );=0D + sizeof (EFI_FVB_INSTANCE) -=0D + sizeof (EFI_FIRMWARE_VOLUME_HEADER)=0D + );=0D }=0D =0D - mFvbModuleGlobal.FvbInstance =3D (EFI_FVB_INSTANCE *) AllocateRuntime= ZeroPool (BufferSize);=0D + mFvbModuleGlobal.FvbInstance =3D (EFI_FVB_INSTANCE *)AllocateRuntimeZ= eroPool (BufferSize);=0D if (mFvbModuleGlobal.FvbInstance =3D=3D NULL) {=0D ASSERT (FALSE);=0D return;=0D }=0D =0D - MaxLbaSize =3D 0;=0D - FvbInstance =3D mFvbModuleGlobal.FvbInstance;=0D - mFvbModuleGlobal.NumFv =3D 0;=0D + MaxLbaSize =3D 0;=0D + FvbInstance =3D mFvbModuleGlobal.FvbInstance;=0D + mFvbModuleGlobal.NumFv =3D 0;=0D =0D for (Idx =3D 0; ; Idx++) {=0D - if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) {=0D + if ((mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0) && (mPlatformFvBas= eAddress[Idx].FvBase =3D=3D 0)) {=0D break;=0D }=0D +=0D BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase;=0D - FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;=0D + FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)BaseAddress;=0D =0D if (!IsFvHeaderValid (BaseAddress, FvHeader)) {=0D DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHead= er));=0D @@ -269,22 +338,24 @@ FvbInitialize ( FvbInstance->Signature =3D FVB_INSTANCE_SIGNATURE;=0D CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength)= ;=0D =0D - FvHeader =3D &(FvbInstance->FvHeader);=0D + FvHeader =3D &(FvbInstance->FvHeader);=0D FvbInstance->FvBase =3D (UINTN)BaseAddress;=0D =0D //=0D // Process the block map for each FV=0D //=0D - FvbInstance->NumOfBlocks =3D 0;=0D + FvbInstance->NumOfBlocks =3D 0;=0D for (PtrBlockMapEntry =3D FvHeader->BlockMap;=0D PtrBlockMapEntry->NumBlocks !=3D 0;=0D - PtrBlockMapEntry++) {=0D + PtrBlockMapEntry++)=0D + {=0D //=0D // Get the maximum size of a block.=0D //=0D if (MaxLbaSize < PtrBlockMapEntry->Length) {=0D - MaxLbaSize =3D PtrBlockMapEntry->Length;=0D + MaxLbaSize =3D PtrBlockMapEntry->Length;=0D }=0D +=0D FvbInstance->NumOfBlocks +=3D PtrBlockMapEntry->NumBlocks;=0D }=0D =0D @@ -297,10 +368,9 @@ FvbInitialize ( //=0D // Move on to the next FvbInstance=0D //=0D - FvbInstance =3D (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) = +=0D - FvHeader->HeaderLength +=0D - (sizeof (EFI_FVB_INSTANCE) - s= izeof (EFI_FIRMWARE_VOLUME_HEADER)));=0D -=0D + FvbInstance =3D (EFI_FVB_INSTANCE *)((UINTN)((UINT8 *)FvbInstance) += =0D + FvHeader->HeaderLength +=0D + (sizeof (EFI_FVB_INSTANCE) - size= of (EFI_FIRMWARE_VOLUME_HEADER)));=0D }=0D }=0D }=0D diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServic= e/SpiFvbServiceSmm.inf index 0cfa3f909b..0485b73679 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf @@ -45,6 +45,8 @@ [Pcd]=0D gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUM= ES=0D gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUM= ES=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## SOMETI= MES_CONSUMES=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOMETI= MES_CONSUMES=0D =0D [Sources]=0D FvbInfo.c=0D @@ -61,6 +63,8 @@ [Guids]=0D gEfiFirmwareFileSystem2Guid ## CONSUMES=0D gEfiSystemNvDataFvGuid ## CONSUMES=0D + gEfiVariableGuid ## SOMETIMES_CONSUMES=0D + gEfiAuthenticatedVariableGuid ## SOMETIMES_CONSUMES=0D =0D [Depex]=0D TRUE=0D diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 485cb3e80a..63dae756ad 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -186,3 +186,11 @@ # @Prompt VTd abort DMA mode support.=0D gIntelSiliconPkgTokenSpaceGuid.PcdVTdSupportAbortDmaMode|FALSE|BOOLEAN|0= x0000000C=0D =0D + ## Define Flash Variable Store type.

=0D + # When Flash Variable Store corruption happened, the SpiFvbService will= recreate Variable Store=0D + # with valid header information provided by this PCD value.
=0D + # 0: Variable Store is gEfiVariableGuid type.
=0D + # 1: Variable Store is gEfiAuthenticatedVariableGuid type.
=0D + # Other value: reserved for future use.
=0D + # @Prompt Flash Variable Store type.=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType|0x00|UINT8|0x00= 00000E=0D --=20 2.35.0.windows.1