From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web11.15545.1675951199107516298 for ; Thu, 09 Feb 2023 05:59:59 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WZ0EHYj1; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 131D4B82081; Thu, 9 Feb 2023 13:59:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9447AC4339C; Thu, 9 Feb 2023 13:59:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675951195; bh=UoBUUKieStnyTN9FZxTJLeMxK5bQ/24sMJHitauFFkM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WZ0EHYj1S0a02XxA6xJByIJKWxzh1mEz2IepTCGBwMsN8/aBlNQHio0WyzDXGVEdZ A56w/cNM/m1mc8BpYQFalIjPHrhcT7ETpx7u3+Oh4TAjkeyHJBBxiVt9hNKvjNounW tD4K1jQuJBLpbII/FpHsaMJnVL7nCC9K4zyZr/dkv4ecKfOwh0hk0n2VQrtg6+799t x8KIYe0RMn7hZYFnfzoA8Ht9+z/D8IvdcWNDBMz2T8IF1l3Z50GSXXFTicRm7kBKOK ynirYU8xSiVT4Bw512L6pJgUScJNCa2Sjb7C6tv307EJWROCi+zApvJlARGrPB7wHw dZcCyqs/Qu3Cg== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Michael Kinney , Liming Gao , Jiewen Yao , Michael Kubacki , Sean Brogan , Rebecca Cran , Leif Lindholm , Sami Mujawar , Taylor Beebe Subject: [PATCH v4 03/11] ArmPkg/CpuDxe ARM: Fix page-to-section attribute conversion Date: Thu, 9 Feb 2023 14:59:28 +0100 Message-Id: <20230209135936.789983-4-ardb@kernel.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230209135936.789983-1-ardb@kernel.org> References: <20230209135936.789983-1-ardb@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The section-to-page attribute conversion takes the shareability and execute-never attributes into account, whereas the page-to-section counterpart does not. The result is that GetMemoryRegionPage () -which takes a section attribute argument (via *RegionAttributes) that is ostensibly based on the first page in the range, but differs from the actual page attributes when converted back- may return with a RegionLength of zero. This is incorrect, and confuses code that scans a region by calling GetMemoryRegion () in sequence. So fix the conversion, and ASSERT () on a non-zero region length. Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 3 +++ ArmPkg/Include/Chipset/ArmV7Mmu.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mm= u.c index ea856f5cdd26..8eb1f71395f5 100644 --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c @@ -480,6 +480,8 @@ GetMemoryRegion ( =0D PageAttributes =3D PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_A= TTRIBUTE_MASK;=0D *RegionAttributes =3D TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (P= ageAttributes) |=0D + TT_DESCRIPTOR_CONVERT_TO_SECTION_S (PageAttributes= ) |=0D + TT_DESCRIPTOR_CONVERT_TO_SECTION_XN (PageAttribute= s) |=0D TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttribute= s);=0D }=0D =0D @@ -494,6 +496,7 @@ GetMemoryRegion ( =0D // Scan the page table to find the end of the region.=0D Status =3D GetMemoryRegionPage (PageTable, BaseAddress, RegionLength= , RegionAttributes);=0D + ASSERT (*RegionLength > 0);=0D =0D // If we have found the end of the region (Status =3D=3D EFI_SUCCESS= ) then we exit the for-loop=0D if (Status =3D=3D EFI_SUCCESS) {=0D diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/Arm= V7Mmu.h index 6a2584ceb303..e0219747df86 100644 --- a/ArmPkg/Include/Chipset/ArmV7Mmu.h +++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h @@ -128,6 +128,8 @@ #define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc) ((((Desc) & (0x3= << 12)) >> 6) | (Desc & (0x3 << 2)))=0D =0D #define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & T= T_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)=0D +#define TT_DESCRIPTOR_CONVERT_TO_SECTION_S(Desc) ((((Desc) & T= T_DESCRIPTOR_PAGE_S_MASK) << 6) & TT_DESCRIPTOR_SECTION_S_MASK)=0D +#define TT_DESCRIPTOR_CONVERT_TO_SECTION_XN(Desc) ((((Desc) & T= T_DESCRIPTOR_PAGE_XN_MASK) << 4) & TT_DESCRIPTOR_SECTION_XN_MASK)=0D #define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc) ((((Desc) & (= 0x3 << 6)) << 6) | (Desc & (0x3 << 2)))=0D =0D #define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MA= SK | TT_DESCRIPTOR_SECTION_NG_MASK | \=0D --=20 2.39.1