From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.22480.1675963258576834863 for ; Thu, 09 Feb 2023 09:20:58 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=GF6j9NPZ; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: chasel.chiu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675963258; x=1707499258; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=27KoQEqclzsvtzVd7L+QYoTIN7LUhYaPXb+yPUZXYmc=; b=GF6j9NPZwshQgAmresonJOcLNU6qKM/kQE/eFdyyMUAYEkHvZorynZGE F9WjruiWBglQiNkyUdG+7igU7I67tkmcTGHX5UpUbtukV81N+Wtu5hqih 9AZxzMZ5Be+dhqg19Fe7N1O0Unhb7Ebw3ISkAKvLcAKfk2KRTJCuibbwJ bwl/1lqqfhEaYrFvQpt2exikgaMQ6F30oElnxuWJA3fWfkLsWcYC12aLB JuKS3LpcEOK4rWhwMdI53NETSudtvvjqU3fD1/5yXbHJRJFRhr3JJgkv1 44nT/RdxKF8IMgCgbXBy3cAF2QEVm+swEuylXds0L/hAZyi1ZZurbdag7 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="313826443" X-IronPort-AV: E=Sophos;i="5.97,284,1669104000"; d="scan'208";a="313826443" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2023 09:20:25 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="996610711" X-IronPort-AV: E=Sophos;i="5.97,284,1669104000"; d="scan'208";a="996610711" Received: from cchiu4-mobl.gar.corp.intel.com ([10.212.151.147]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2023 09:20:24 -0800 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Ashraf Ali S , Isaac Oram , Rangasai V Chaganty , Ray Ni , Michael Kubacki Subject: [edk2-platforms: PATCH v3] IntelSiliconPkg/SpiFvbServiceSmm: Support Additional NVS region. Date: Thu, 9 Feb 2023 09:20:08 -0800 Message-Id: <20230209172008.1568-1-chasel.chiu@intel.com> X-Mailer: git-send-email 2.35.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Platform may implement an additional NVS region following Regular variable region and in this case SpiFvbService should include both region size when calculating the total NVS region size. One usage model is EventLog NVS region and there could be others. Example NVS flash map for such usage model: -------------- |UEI Variable| -------------- |EventLog | <=3D this is Additional NVS region -------------- |FTW Working | -------------- |FTW Spare | -------------- Cc: Ashraf Ali S Cc: Isaac Oram Cc: Rangasai V Chaganty Cc: Ray Ni Cc: Michael Kubacki Signed-off-by: Chasel Chiu --- Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom= mon.c | 17 +++++++++++++++++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm= .inf | 7 ++++--- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 8 ++++++++ 3 files changed, 29 insertions(+), 3 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi= ce/SpiFvbServiceCommon.c index 942abf95a6..cf5a40bf27 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c @@ -568,6 +568,23 @@ GetVariableFvInfo ( return;=0D }=0D =0D + //=0D + // GetVariableFlashNvStorageInfo () only reports regular variable region= information,=0D + // if platform implemented an additional NVS region following the regula= r variable region,=0D + // the both region size should be included as overall NVS region size.=0D + // Example NVS flash map for such usage model:=0D + // --------------=0D + // |UEI Variable|=0D + // --------------=0D + // |EventLog | <=3D this is Additional NVS region=0D + // --------------=0D + // |FTW Working |=0D + // --------------=0D + // |FTW Spare |=0D + // --------------=0D + //=0D + NvStoreLength +=3D PcdGet32 (PcdFlashNvStorageAdditionalSize);=0D +=0D Status =3D GetVariableFlashFtwSpareInfo (&NvBaseAddress, &Length64);=0D if (!EFI_ERROR (Status)) {=0D // Stay within the current UINT32 size assumptions in the variable sta= ck.=0D diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServic= e/SpiFvbServiceSmm.inf index 73049eceb2..f4009d8d8c 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf @@ -43,9 +43,10 @@ IntelSiliconPkg/IntelSiliconPkg.dec=0D =0D [Pcd]=0D - gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUM= ES=0D - gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUM= ES=0D - gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOMETI= MES_CONSUMES=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON= SUMES=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON= SUMES=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOM= ETIMES_CONSUMES=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageAdditionalSize ## CON= SUMES=0D =0D [Sources]=0D FvbInfo.c=0D diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 63dae756ad..b10529b69d 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -194,3 +194,11 @@ # Other value: reserved for future use.
=0D # @Prompt Flash Variable Store type.=0D gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType|0x00|UINT8|0x00= 00000E=0D +=0D + ## Declares Additional NVS Variable Region Size.

=0D + # Platform may implement a Regular variable region and an additional va= riable region, which will require this PCD=0D + # to tell SpiFvbService to include both regions.
=0D + # 0: No additional variable region.
=0D + # non-zero: The size of an additional variable region following the Reg= ular variable region.
=0D + # @Prompt Additional NVS Variable Region Size.=0D + gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageAdditionalSize|0x0000000= 0|UINT32|0x0000000F=0D --=20 2.35.0.windows.1