From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: devel@edk2.groups.io
Cc: Chasel Chiu <chasel.chiu@intel.com>,
Ashraf Ali S <ashraf.ali.s@intel.com>,
Isaac Oram <isaac.w.oram@intel.com>,
Rangasai V Chaganty <rangasai.v.chaganty@intel.com>,
Ray Ni <ray.ni@intel.com>,
Michael Kubacki <michael.kubacki@microsoft.com>
Subject: [edk2-platforms: PATCH v4] IntelSiliconPkg/SpiFvbServiceSmm: Support Additional NVS region.
Date: Thu, 9 Feb 2023 10:27:18 -0800 [thread overview]
Message-ID: <20230209182718.1942-1-chasel.chiu@intel.com> (raw)
Platform may implement an additional NVS region following
Regular variable region and in this case SpiFvbService should include
both region size when calculating the total NVS region size.
The PcdFlashNvStorageAdditionalSize is for compatible with legacy
usages that should be deprecated. The new usage model should define
separate regions without implicit connections to UEFI Variable or
FTW regions.
Example NVS flash map for such legacy usage:
Note: PcdFlashNvStorageAdditionalSize is equal to platform
PcdFlashFvNvStorageEventLogSize.
---------------
|UEFI Variable|
---------------
|EventLog | <= this is Additional NVS region
---------------
|FTW Working |
---------------
|FTW Spare |
---------------
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c | 22 ++++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 7 ++++---
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 11 +++++++++++
3 files changed, 37 insertions(+), 3 deletions(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
index 942abf95a6..fcdc715263 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
@@ -568,6 +568,28 @@ GetVariableFvInfo (
return;
}
+ //
+ // GetVariableFlashNvStorageInfo () only reports regular variable region information,
+ // if platform implemented an additional NVS region following the regular variable region,
+ // then both region size should be included as overall NVS region size.
+ //
+ // The below PcdFlashNvStorageAdditionalSize is for compatible with legacy usages that should be deprecated.
+ // The new usage model should define separate regions without implicit connections to UEFI Variable or FTW regions.
+ //
+ // Example NVS flash map for such legacy usage:
+ // Note: PcdFlashNvStorageAdditionalSize is equal to platform PcdFlashFvNvStorageEventLogSize.
+ // ---------------
+ // |UEFI Variable|
+ // ---------------
+ // |EventLog | <= this is Additional NVS region
+ // ---------------
+ // |FTW Working |
+ // ---------------
+ // |FTW Spare |
+ // ---------------
+ //
+ NvStoreLength += PcdGet32 (PcdFlashNvStorageAdditionalSize);
+
Status = GetVariableFlashFtwSpareInfo (&NvBaseAddress, &Length64);
if (!EFI_ERROR (Status)) {
// Stay within the current UINT32 size assumptions in the variable stack.
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
index 73049eceb2..f4009d8d8c 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
@@ -43,9 +43,10 @@
IntelSiliconPkg/IntelSiliconPkg.dec
[Pcd]
- gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
- gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOMETIMES_CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOMETIMES_CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageAdditionalSize ## CONSUMES
[Sources]
FvbInfo.c
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 63dae756ad..d73a51ca52 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -194,3 +194,14 @@
# Other value: reserved for future use.<BR>
# @Prompt Flash Variable Store type.
gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType|0x00|UINT8|0x0000000E
+
+ ## Declares Additional NVS Region Size.<BR><BR>
+ # Platform may implement a Regular variable region and an additional region, which will require this PCD
+ # to tell SpiFvbService to include both regions.
+ # Note: This PCD is for compatible with legacy usages that should be deprecated.
+ # The new usage model should define separate regions without implicit connections to UEFI Variable or FTW regions.<BR>
+ # Example legacy usage is to set this PCD equal to platform PcdFlashFvNvStorageEventLogSize.
+ # 0: No additional NVS region.<BR>
+ # non-zero: The size of an additional NVS region following the Regular variable region.<BR>
+ # @Prompt Additional NVS Region Size.
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageAdditionalSize|0x00000000|UINT32|0x0000000F
--
2.35.0.windows.1
next reply other threads:[~2023-02-09 18:27 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-09 18:27 Chiu, Chasel [this message]
2023-02-09 18:34 ` [edk2-platforms: PATCH v4] IntelSiliconPkg/SpiFvbServiceSmm: Support Additional NVS region Isaac Oram
2023-02-09 18:37 ` Chiu, Chasel
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