From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.7856.1676009142701719213 for ; Thu, 09 Feb 2023 22:05:43 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=IAGdKNpq; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: jiaxin.wu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676009143; x=1707545143; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=rssod5VaTaiRcPkkloAeNDptlQD+mrArV1hM5niGr1g=; b=IAGdKNpqoConRjUtf00Qv64KmIoQgqIXEIrtT96+m4H+pUT1qRHPAEzW OyCqUPTT4GjtO+rSG3BBafEZ+8hafjOe0di049ZRy8IOrltS/1sTzjIcX 2CNLfy4Va5GSBHoQYOOpVnatk9W95P0TMBwxrutx7DMft3YVNOj3lXKHh niNXMOPECLj1RDTbHa6gJ3wI7oKnXRQ+MwaZukopzTdqjJqwzPbfGedYZ wVorGjsKkM7FylLGClkQ2RhFDqFPfzHevVRhAIRDd3h0rl+z4xN9Zj9rX Z2ZJMSe0yhDaaFyxENBx97U9pSGlvjUAWfXaueltW02hGySslQGJClo+s Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="310711774" X-IronPort-AV: E=Sophos;i="5.97,286,1669104000"; d="scan'208";a="310711774" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2023 22:05:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="791854733" X-IronPort-AV: E=Sophos;i="5.97,286,1669104000"; d="scan'208";a="791854733" Received: from sh1gapp1009.ccr.corp.intel.com ([10.239.189.79]) by orsmga004.jf.intel.com with ESMTP; 09 Feb 2023 22:05:35 -0800 From: "Wu, Jiaxin" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Zeng Star , Laszlo Ersek , Gerd Hoffmann , Rahul Kumar Subject: [PATCH v4 4/5] UefiCpuPkg/SmmCpuFeaturesLib: Skip SMBASE configuration Date: Fri, 10 Feb 2023 14:05:18 +0800 Message-Id: <20230210060519.11100-5-jiaxin.wu@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 In-Reply-To: <20230210060519.11100-1-jiaxin.wu@intel.com> References: <20230210060519.11100-1-jiaxin.wu@intel.com> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337 This patch is to avoid configure SMBASE if SmBase relocation has been done. If gSmmBaseHobGuid found, means SmBase info has been relocated and recorded in the SmBase array. No need to do the relocation in SmmCpuFeaturesInitializeProcessor(). Cc: Eric Dong Cc: Ray Ni Cc: Zeng Star Cc: Laszlo Ersek Cc: Gerd Hoffmann Cc: Rahul Kumar Signed-off-by: Jiaxin Wu --- .../Library/SmmCpuFeaturesLib/CpuFeaturesLib.h | 2 ++ .../SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c | 23 +++++++++++++++++++--- .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 ++++ .../SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 1 + UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 1 - .../StandaloneMmCpuFeaturesLib.inf | 4 ++++ 6 files changed, 31 insertions(+), 4 deletions(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/CpuFeaturesLib.h b/UefiCpuPkg/Library/SmmCpuFeaturesLib/CpuFeaturesLib.h index fd3e902547..c2e4fbe96b 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/CpuFeaturesLib.h +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/CpuFeaturesLib.h @@ -7,15 +7,17 @@ **/ #ifndef CPU_FEATURES_LIB_H_ #define CPU_FEATURES_LIB_H_ +#include #include #include #include #include #include +#include /** Performs library initialization. This initialization function contains common functionality shared betwen all diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c index d5eaaa7a99..7c3836286b 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c @@ -36,10 +36,16 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // Set default value to assume IA-32 Architectural MSRs are used // UINT32 mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE; UINT32 mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK; +// +// Indicate SmBase for each Processors has been relocated or not. If TRUE, +// means no need to do the relocation in SmmCpuFeaturesInitializeProcessor(). +// +BOOLEAN mSmmCpuFeaturesSmmRelocated; + // // Set default value to assume MTRRs need to be configured on each SMI // BOOLEAN mNeedConfigureMtrrs = TRUE; @@ -142,10 +148,16 @@ CpuFeaturesLibInitialization ( // // Allocate array for state of SMRR enable on all CPUs // mSmrrEnabled = (BOOLEAN *)AllocatePool (sizeof (BOOLEAN) * GetCpuMaxLogicalProcessorNumber ()); ASSERT (mSmrrEnabled != NULL); + + // + // If gSmmBaseHobGuid found, means SmBase info has been relocated and recorded + // in the SmBase array. + // + mSmmCpuFeaturesSmmRelocated = (BOOLEAN)(GetFirstGuidHob (&gSmmBaseHobGuid) != NULL); } /** Called during the very first SMI into System Management Mode to initialize CPU features, including SMBASE, for the currently executing CPU. Since this @@ -185,14 +197,19 @@ SmmCpuFeaturesInitializeProcessor ( UINT32 RegEdx; UINTN FamilyId; UINTN ModelId; // - // Configure SMBASE. + // No need to configure SMBASE if SmBase relocation has been done. // - CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET); - CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex]; + if (!mSmmCpuFeaturesSmmRelocated) { + // + // Configure SMBASE. + // + CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET); + CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex]; + } // // Intel(R) 64 and IA-32 Architectures Software Developer's Manual // Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Family // diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf index 9ac7dde78f..280a4b8b39 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf @@ -31,10 +31,14 @@ [LibraryClasses] BaseLib PcdLib MemoryAllocationLib DebugLib + HobLib + +[Guids] + gSmmBaseHobGuid ## CONSUMES [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES [FeaturePcd] diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf index 86d367e0a0..4bb045244b 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf @@ -62,10 +62,11 @@ [Guids] gMsegSmramGuid ## SOMETIMES_CONSUMES ## HOB gEfiAcpi20TableGuid ## SOMETIMES_CONSUMES ## SystemTable gEfiAcpi10TableGuid ## SOMETIMES_CONSUMES ## SystemTable + gSmmBaseHobGuid ## CONSUMES [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize ## SOMETIMES_CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize ## SOMETIMES_CONSUMES diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c index 3cf162ada0..455fe83991 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c @@ -6,11 +6,10 @@ **/ #include #include -#include #include #include #include #include #include diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf index b1f60a5505..63259e44e7 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf @@ -32,10 +32,14 @@ [LibraryClasses] BaseLib DebugLib MemoryAllocationLib PcdLib + HobLib + +[Guids] + gSmmBaseHobGuid ## CONSUMES [FixedPcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES [FeaturePcd] -- 2.16.2.windows.1