From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web11.11751.1676027393711435482 for ; Fri, 10 Feb 2023 03:09:53 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=ihcS3nEO; spf=pass (domain: redhat.com, ip: 170.10.129.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1676027392; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=5O1PrOuaYtlARNrWiIodP2XfFLXZxuQ7+OCFVaZXlNk=; b=ihcS3nEOaB3BaLlyFOult6pTzT6603cC3wuQ9+uBo8yu6tIph4fBlla1uANkMc1X/Ghge+ j2ioC00ushQFFx+yyn3q2K7HSNEWICET1vYYgmZnSGwf6QsXuK39N/6LTBNpgmiIGh93wV O42cdvqxfgSs3HHbY/G6liKqtGCGqzo= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-139-FUTr64ZFPCiBKWJ2c-h2Xw-1; Fri, 10 Feb 2023 06:09:49 -0500 X-MC-Unique: FUTr64ZFPCiBKWJ2c-h2Xw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 002C52806040; Fri, 10 Feb 2023 11:09:49 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.192.128]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3C1D2140EBF4; Fri, 10 Feb 2023 11:09:48 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id EB1801800082; Fri, 10 Feb 2023 12:09:46 +0100 (CET) Date: Fri, 10 Feb 2023 12:09:46 +0100 From: "Gerd Hoffmann" To: devel@edk2.groups.io, yuanhao.xie@intel.com Cc: "Dong, Guo" , "Ni, Ray" , "Rhodes, Sean" , "Lu, James" , "Guo, Gua" Subject: Re: [edk2-devel] [PATCH 2/5] UefiCpuPkg: Contiguous memory allocation and code clean-up. Message-ID: <20230210110946.qgxzu3rs77wgltno@sirius.home.kraxel.org> References: <20230207134939.273-1-yuanhao.xie@intel.com> <20230207134939.273-3-yuanhao.xie@intel.com> <20230208110933.bho5lybb6evnqcoh@sirius.home.kraxel.org> MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, > 3) The special case you have to handle is not running on a AMD > Processor, but AmdSev being active (i.e. UseSevEsAPMethod == True). > Otherwise it should be just standard Ia32 and X64, there should be no > need to check whenever you are running on a AMD processor. > > I understand your point, but for both cases (check AmdSev, standard > Ia32 and X64), AMD related code will be changed. We would like to keep > the original implementation as much as possible. Well, the original implementation never checks for an AMD Processor, it only checks whenever SEV-ES is active (and sets UseSevEsAPMethod in that case). So why you are adding that check? take care, Gerd