From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) by mx.groups.io with SMTP id smtpd.web10.13404.1676032259676605953 for ; Fri, 10 Feb 2023 04:30:59 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=om5+nlo2; spf=pass (domain: ventanamicro.com, ip: 209.85.216.48, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pj1-f48.google.com with SMTP id z14-20020a17090abd8e00b00233bb9d6bdcso189288pjr.4 for ; Fri, 10 Feb 2023 04:30:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=niA+R/MWyUbFOsMZbCry3hHNYEB+UpAACdproYdQ6Xg=; b=om5+nlo2WdFLTRp2khavYK/cggThUgfDqoJcLyNrfuJnrIWOA5wMMqHXC/Uxnp3ckR 1XlbW8eU6aBewF+wHjPBuhOv6Vq8jtganwZkmYis+KK3FI8gyWaOzOG2mayFZ4xwK9Xx eZhOxK9CcoT630VBWDiiHhGFG3KWboYVPabi2P6/UyEXq3j9wjhXWBT8Uu9SuP6+QEqp vryYBbUdroYZ51yw+iqEdy9D0u3SxXCl1ClAi9vxmgkfg9vdVFjo+645hbcHzBVxx5iI E5nFPdwxbzLNCxl1+uXYoWXq/+1s8TkvdNyiv0D2g2wYGsSg0ddQ1p4UV/Klr6voF4sc ftDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=niA+R/MWyUbFOsMZbCry3hHNYEB+UpAACdproYdQ6Xg=; b=LLZGVpzQT3sal71TbymPW6jnJVs42jKGzGJek3wmB55A/0+LaoronhzEK1tnFns3tz CYwKsrcSSiKhnurQhEwkHp/TnzdCcvIeY0jX2gAMIQH1JsihkyXyb5OjT97/fPS6ivls 12LQXKq5TMWU3yNT9lg1ZXPiXvVs/aEZX+8a2NxaPB/Ty1aKhTByRPr96K20K78jQZTW BXTagLtyHyYFWSYu7vk7VCnTA68W8M26JoKsKhcEyM8B/xXDJ5//XNywscYlXEeM671E vy/2wo28sq1ZeFBh83+4n2TxTxmj8E1N/PfNuSqot9QEFcnEv1OjeefbHPo0I9PB5EpL 3ugg== X-Gm-Message-State: AO0yUKUVhLoJde5yKrB7+2bTyQox9X7NHBsyWvzJbJAdw9uAzOr6UeNy EZ3O7bzd46C1aUIHt/9/aq3uT0vysjFef/nI X-Google-Smtp-Source: AK7set/V8VrVolNbFEsQ3Fg+zG4Vzjd3KZx10qyAEyQemD8os4sz5kL863ZImvo3GhnMLs9OTsDFsQ== X-Received: by 2002:a17:902:dac6:b0:196:59a0:bffe with SMTP id q6-20020a170902dac600b0019659a0bffemr17589488plx.17.1676032259014; Fri, 10 Feb 2023 04:30:59 -0800 (PST) Return-Path: Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id b17-20020a170902ed1100b0019a73faf773sm1172961pld.71.2023.02.10.04.30.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 04:30:58 -0800 (PST) From: "Sunil V L" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Daniel Schaefer , Gerd Hoffmann , Abner Chang , Heinrich Schuchardt , Andrei Warkentin Subject: [edk2-staging/RiscV64QemuVirt PATCH V8 04/19] UefiCpuPkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions Date: Fri, 10 Feb 2023 18:00:26 +0530 Message-Id: <20230210123041.1489506-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230210123041.1489506-1-sunilvl@ventanamicro.com> References: <20230210123041.1489506-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 RISC-V UEFI based platforms need to support RISCV_EFI_BOOT_PROTOCOL. Add this protocol GUID definition and the header file required. Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Daniel Schaefer Cc: Gerd Hoffmann Signed-off-by: Sunil V L Acked-by: Abner Chang Reviewed-by: Heinrich Schuchardt Reviewed-by: Andrei Warkentin Acked-by: Ray Ni --- UefiCpuPkg/UefiCpuPkg.dec | 7 ++++ UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h | 34 ++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index cff239d5283e..903ad52da91b 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -86,6 +86,13 @@ [Protocols] ## Include/Protocol/SmMonitorInit.h gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }} +[Protocols.RISCV64] + # + # Protocols defined for RISC-V systems + # + ## Include/Protocol/RiscVBootProtocol.h + gRiscVEfiBootProtocolGuid = { 0xccd15fec, 0x6f73, 0x4eec, { 0x83, 0x95, 0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf }} + # # [Error.gUefiCpuPkgTokenSpaceGuid] # 0x80000001 | Invalid value provided. diff --git a/UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h b/UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h new file mode 100644 index 000000000000..ed223b852d34 --- /dev/null +++ b/UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h @@ -0,0 +1,34 @@ +/** @file + RISC-V Boot Protocol mandatory for RISC-V UEFI platforms. + + @par Revision Reference: + The protocol specification can be found at + https://github.com/riscv-non-isa/riscv-uefi + + Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef RISCV_BOOT_PROTOCOL_H_ +#define RISCV_BOOT_PROTOCOL_H_ + +typedef struct _RISCV_EFI_BOOT_PROTOCOL RISCV_EFI_BOOT_PROTOCOL; + +#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x00010000 +#define RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION \ + RISCV_EFI_BOOT_PROTOCOL_REVISION + +typedef +EFI_STATUS +(EFIAPI *EFI_GET_BOOT_HARTID)( + IN RISCV_EFI_BOOT_PROTOCOL *This, + OUT UINTN *BootHartId + ); + +typedef struct _RISCV_EFI_BOOT_PROTOCOL { + UINT64 Revision; + EFI_GET_BOOT_HARTID GetBootHartId; +} RISCV_EFI_BOOT_PROTOCOL; + +#endif -- 2.34.1