From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web11.8363.1676267307290691542 for ; Sun, 12 Feb 2023 21:48:27 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=NfUzRnG3; spf=pass (domain: intel.com, ip: 192.55.52.93, mailfrom: jiaxin.wu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676267307; x=1707803307; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=jygK8A2A597KqSUxkUO0/EqMorvpVCjnO8LEvnlEdsY=; b=NfUzRnG33nDC4kvyA451CLuV10SU0LPRS89kH/AhYRHjgAE/4tho6vaW gkfBfRnHRUtaJxZUP9b+ZWIFOekZlWZszcvtV12nHkg1IYwZQrhI0oGd/ SkeNSgl20y3e5pjQua8/xARxcv16Yat5oIPwo7C3QTcRvKETXJ/TrDhRS DsASAyMg1dbLhX04YxC5s0giAf85kAV22Aan62eeQfuhjmsqyG6U+k198 ixGp5RCJCzfZiUhLQthKRF5ciTAk0ZfKuEsxx/BcKTuk05Y2N/fMF1ZI1 J40c2Rjr3PQUeUdBCGLN1qL9wRJCVoNJQk7uysu9svbRK7mrqEaIWc8h4 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10619"; a="328521105" X-IronPort-AV: E=Sophos;i="5.97,293,1669104000"; d="scan'208";a="328521105" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2023 21:48:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10619"; a="842649634" X-IronPort-AV: E=Sophos;i="5.97,293,1669104000"; d="scan'208";a="842649634" Received: from sh1gapp1009.ccr.corp.intel.com ([10.239.189.79]) by orsmga005.jf.intel.com with ESMTP; 12 Feb 2023 21:47:59 -0800 From: "Wu, Jiaxin" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Zeng Star , Laszlo Ersek , Gerd Hoffmann , Rahul Kumar Subject: [PATCH v5 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Replace mIsBsp by mBspApicId Date: Mon, 13 Feb 2023 13:47:47 +0800 Message-Id: <20230213054751.8692-3-jiaxin.wu@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 In-Reply-To: <20230213054751.8692-1-jiaxin.wu@intel.com> References: <20230213054751.8692-1-jiaxin.wu@intel.com> This patch is to replace mIsBsp by mBspApicId. Cc: Eric Dong Cc: Ray Ni Cc: Zeng Star Cc: Laszlo Ersek Cc: Gerd Hoffmann Cc: Rahul Kumar Signed-off-by: Jiaxin Wu --- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index 2ac655d032..6e795d1756 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -57,11 +57,10 @@ SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate = &mSmmCpuPrivateData; // // SMM Relocation variables // volatile BOOLEAN *mRebased; -volatile BOOLEAN mIsBsp; /// /// Handle for the SMM CPU Protocol /// EFI_HANDLE mSmmCpuHandle = NULL; @@ -83,10 +82,12 @@ EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL mSmmMemoryAttribute = { EdkiiSmmClearMemoryAttributes }; EFI_CPU_INTERRUPT_HANDLER mExternalVectorTable[EXCEPTION_VECTOR_NUMBER]; +UINT32 mBspApicId = 0; + // // SMM stack information // UINTN mSmmStackArrayBase; UINTN mSmmStackArrayEnd; @@ -341,39 +342,42 @@ VOID EFIAPI SmmInitHandler ( VOID ) { - UINT32 ApicId; - UINTN Index; + UINT32 ApicId; + UINTN Index; + BOOLEAN IsBsp; // // Update SMM IDT entries' code segment and load IDT // AsmWriteIdtr (&gcSmiIdtr); ApicId = GetApicId (); + IsBsp = (BOOLEAN)(mBspApicId == ApicId); + ASSERT (mNumberOfCpus <= mMaxNumberOfCpus); for (Index = 0; Index < mNumberOfCpus; Index++) { if (ApicId == (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId) { // // Initialize SMM specific features on the currently executing CPU // SmmCpuFeaturesInitializeProcessor ( Index, - mIsBsp, + IsBsp, gSmmCpuPrivate->ProcessorInfo, &mCpuHotPlugData ); if (!mSmmS3Flag) { // // Check XD and BTS features on each processor on normal boot // CheckFeatureSupported (); - } else if (mIsBsp) { + } else if (IsBsp) { // // BSP rebase is already done above. // Initialize private data during S3 resume // InitializeMpSyncData (); @@ -405,11 +409,10 @@ SmmRelocateBases ( { UINT8 BakBuf[BACK_BUF_SIZE]; SMRAM_SAVE_STATE_MAP BakBuf2; SMRAM_SAVE_STATE_MAP *CpuStatePtr; UINT8 *U8Ptr; - UINT32 ApicId; UINTN Index; UINTN BspIndex; // // Make sure the reserved size is large enough for procedure SmmInitTemplate. @@ -446,21 +449,20 @@ SmmRelocateBases ( CopyMem (U8Ptr, gcSmmInitTemplate, gcSmmInitSize); // // Retrieve the local APIC ID of current processor // - ApicId = GetApicId (); + mBspApicId = GetApicId (); // // Relocate SM bases for all APs // This is APs' 1st SMI - rebase will be done here, and APs' default SMI handler will be overridden by gcSmmInitTemplate // - mIsBsp = FALSE; BspIndex = (UINTN)-1; for (Index = 0; Index < mNumberOfCpus; Index++) { mRebased[Index] = FALSE; - if (ApicId != (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId) { + if (mBspApicId != (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId) { SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId); // // Wait for this AP to finish its 1st SMI // while (!mRebased[Index]) { @@ -475,12 +477,11 @@ SmmRelocateBases ( // // Relocate BSP's SMM base // ASSERT (BspIndex != (UINTN)-1); - mIsBsp = TRUE; - SendSmiIpi (ApicId); + SendSmiIpi (mBspApicId); // // Wait for the BSP to finish its 1st SMI // while (!mRebased[BspIndex]) { } -- 2.16.2.windows.1