From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.16974.1676301512293552574 for ; Mon, 13 Feb 2023 07:18:32 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=gesY/qCk; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3F8FC61019; Mon, 13 Feb 2023 15:18:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 08996C4339C; Mon, 13 Feb 2023 15:18:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1676301510; bh=C0dINvZ4yzrckxToI6LQhOnJoTOqlP0tNDFVT5BjLQw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gesY/qCkjBLsUxw9/fnG40TvVOV4TNARHZC8abVNqs4gk4kNSaKO6xZpU1Ca+Un6G FmwfetkfkfqFEaolp90JHk8NY0qBC6jmKux5WUAJkLs3q0/41IV/amHHTgCfLr/yMu acWyE2Jq/vz6YwU0TzyFmdHsNNJ2odD+9atOJXHKZInSRsTwZLoxlFytSB5ESOdYzE XnFP6Ujw+3yv3auVCu+Taj4pl3oAn4RTHE1E7NOno/mcNdZXv5lYip8JL/Y7AZUYCf PoKF9rWq1nj1gJzvuPJYnvPW4fm1csFJRH84EF/08VotJ7aCxqUmZpJWRs2rP7Ft+B y4W68e42Bysjw== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Michael Kinney , Liming Gao , Jiewen Yao , Michael Kubacki , Sean Brogan , Rebecca Cran , Leif Lindholm , Sami Mujawar , Taylor Beebe , Matthew Garrett , Peter Jones , Kees Cook Subject: [RFC 01/13] ArmPkg/Mmu: Remove handling of NONSECURE memory regions Date: Mon, 13 Feb 2023 16:17:58 +0100 Message-Id: <20230213151810.2301480-2-ardb@kernel.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230213151810.2301480-1-ardb@kernel.org> References: <20230213151810.2301480-1-ardb@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Non-secure memory is a distinction that only matters when executing code in the secure world that reasons about the secure vs non-secure address spaces. EDK2 was not designed for that, and the AArch64 version of the MMU handling library already treats them as identical, so let's just drop the ARM memory region types that mark memory as 'non-secure' explicitly. Signed-off-by: Ard Biesheuvel --- ArmPkg/Include/Chipset/ArmV7Mmu.h | 51 +++++++------------- ArmPkg/Include/Library/ArmLib.h | 11 ----- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 5 -- ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 33 +++---------- 4 files changed, 24 insertions(+), 76 deletions(-) diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/Arm= V7Mmu.h index da4f3160f8ff..89b81e33d004 100644 --- a/ArmPkg/Include/Chipset/ArmV7Mmu.h +++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h @@ -157,39 +157,24 @@ #define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE= _ADDRESS_MASK)=0D #define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12=0D =0D -#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SEC= TION_TYPE_SECTION = | \=0D - ((NonSecure) ?= TT_DESCRIPTOR_SECTION_NS : 0) | \=0D - TT_DESCRIPTOR_= SECTION_NG_GLOBAL | \=0D - TT_DESCRIPTOR_= SECTION_S_SHARED | \=0D - TT_DESCRIPTOR_= SECTION_DOMAIN(0) | \=0D - TT_DESCRIPTOR_= SECTION_AP_RW_RW | \=0D - TT_DESCRIPTOR_= SECTION_AF | \=0D - TT_DESCRIPTOR_= SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)=0D -#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SEC= TION_TYPE_SECTION = | \=0D - ((NonSecure) ?= TT_DESCRIPTOR_SECTION_NS : 0) | \=0D - TT_DESCRIPTOR_= SECTION_NG_GLOBAL | \=0D - TT_DESCRIPTOR_= SECTION_S_SHARED | \=0D - TT_DESCRIPTOR_= SECTION_DOMAIN(0) | \=0D - TT_DESCRIPTOR_= SECTION_AP_RW_RW | \=0D - TT_DESCRIPTOR_= SECTION_AF | \=0D - TT_DESCRIPTOR_= SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)=0D -#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SEC= TION_TYPE_SECTION = | \=0D - ((NonSecure) ?= TT_DESCRIPTOR_SECTION_NS : 0) | \=0D - TT_DESCRIPTOR_= SECTION_NG_GLOBAL | \=0D - TT_DESCRIPTOR_= SECTION_S_NOT_SHARED | \=0D - TT_DESCRIPTOR_= SECTION_DOMAIN(0) | \=0D - TT_DESCRIPTOR_= SECTION_AP_RW_RW | \=0D - TT_DESCRIPTOR_= SECTION_XN_MASK | \=0D - TT_DESCRIPTOR_= SECTION_AF | \=0D - TT_DESCRIPTOR_= SECTION_CACHE_POLICY_SHAREABLE_DEVICE)=0D -#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SEC= TION_TYPE_SECTION = | \=0D - ((NonSecure) ? = TT_DESCRIPTOR_SECTION_NS : 0) | \=0D - TT_DESCRIPTOR_S= ECTION_NG_GLOBAL | \=0D - TT_DESCRIPTOR_S= ECTION_S_NOT_SHARED | \=0D - TT_DESCRIPTOR_S= ECTION_DOMAIN(0) | \=0D - TT_DESCRIPTOR_S= ECTION_AP_RW_RW | \=0D - TT_DESCRIPTOR_= SECTION_AF | \=0D - TT_DESCRIPTOR_S= ECTION_CACHE_POLICY_NON_CACHEABLE)=0D +#define TT_DESCRIPTOR_SECTION_DEFAULT (TT_DESCRIPTOR_SECTION_TYPE_SECTION= | \=0D + TT_DESCRIPTOR_SECTION_NG_GLOBAL = | \=0D + TT_DESCRIPTOR_SECTION_S_SHARED = | \=0D + TT_DESCRIPTOR_SECTION_DOMAIN(0) = | \=0D + TT_DESCRIPTOR_SECTION_AP_RW_RW = | \=0D + TT_DESCRIPTOR_SECTION_AF)=0D +=0D +#define TT_DESCRIPTOR_SECTION_WRITE_BACK (TT_DESCRIPTOR_SECTION_DEFAULT |= \=0D + TT_DESCRIPTOR_SECTION_CACHE_POL= ICY_WRITE_BACK_ALLOC)=0D +=0D +#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH (TT_DESCRIPTOR_SECTION_DEFAUL= T | \=0D + TT_DESCRIPTOR_SECTION_CACHE_= POLICY_WRITE_THROUGH_NO_ALLOC)=0D +=0D +#define TT_DESCRIPTOR_SECTION_DEVICE (TT_DESCRIPTOR_SECTION_DEFAULT | \=0D + TT_DESCRIPTOR_SECTION_CACHE_POLICY_= SHAREABLE_DEVICE)=0D +=0D +#define TT_DESCRIPTOR_SECTION_UNCACHED (TT_DESCRIPTOR_SECTION_DEFAULT | \= =0D + TT_DESCRIPTOR_SECTION_CACHE_POLIC= Y_NON_CACHEABLE)=0D =0D #define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE = | \=0D TT_DESCRIPTOR_PAGE= _NG_GLOBAL | \=0D diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLi= b.h index fa605f128bfd..a53f60d98852 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -25,29 +25,18 @@ EFI_MEMORY_WT | EFI_MEMORY_WB | \=0D EFI_MEMORY_UCE)=0D =0D -/**=0D - * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECUR= E_* attributes.=0D - *=0D - * The Non Secure memory attribute (ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_= *) should only=0D - * be used in Secure World to distinguished Secure to Non-Secure memory.=0D - */=0D typedef enum {=0D ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED =3D 0,=0D - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED,=0D ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,=0D - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK,=0D =0D // On some platforms, memory mapped flash region is designed as not supp= orting=0D // shareable attribute, so WRITE_BACK_NONSHAREABLE is added for such spe= cial=0D // need.=0D // Do NOT use below two attributes if you are not sure.=0D ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE,=0D - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE,=0D =0D ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,=0D - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH,=0D ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,=0D - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE=0D } ARM_MEMORY_REGION_ATTRIBUTES;=0D =0D #define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1)= =0D diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Libr= ary/ArmMmuLib/AArch64/ArmMmuLibCore.c index 1ce200c43c72..ee4c5c995ce8 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -39,26 +39,21 @@ ArmMemoryAttributeToPageAttribute ( {=0D switch (Attributes) {=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:=0D return TT_ATTR_INDX_MEMORY_WRITE_BACK;=0D =0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:=0D return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;=0D =0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:=0D return TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;=0D =0D // Uncached and device mappings are treated as outer shareable by defa= ult,=0D case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:=0D return TT_ATTR_INDX_MEMORY_NON_CACHEABLE;=0D =0D default:=0D ASSERT (0);=0D case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:=0D if (ArmReadCurrentEL () =3D=3D AARCH64_EL2) {=0D return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;=0D } else {=0D diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/= ArmMmuLib/Arm/ArmMmuLibCore.c index 28cc9b2fe058..154298357460 100644 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c @@ -100,24 +100,19 @@ PopulateLevel2PageTable ( =0D switch (Attributes) {=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:=0D PageAttributes =3D TT_DESCRIPTOR_PAGE_WRITE_BACK;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:=0D PageAttributes =3D TT_DESCRIPTOR_PAGE_WRITE_BACK;=0D PageAttributes &=3D ~TT_DESCRIPTOR_PAGE_S_SHARED;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:=0D PageAttributes =3D TT_DESCRIPTOR_PAGE_WRITE_THROUGH;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:=0D PageAttributes =3D TT_DESCRIPTOR_PAGE_DEVICE;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:=0D PageAttributes =3D TT_DESCRIPTOR_PAGE_UNCACHED;=0D break;=0D default:=0D @@ -239,39 +234,23 @@ FillTranslationTable ( =0D switch (MemoryRegion->Attributes) {=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_BACK (0);=0D + Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_BACK;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_BACK (0);=0D + Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_BACK;=0D Attributes &=3D ~TT_DESCRIPTOR_SECTION_S_SHARED;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_THROUGH (0);=0D + Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_THROUGH;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_DEVICE (0);=0D + Attributes =3D TT_DESCRIPTOR_SECTION_DEVICE;=0D break;=0D case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_UNCACHED (0);=0D - break;=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_BACK (1);=0D - break;=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_BACK (1);=0D - Attributes &=3D ~TT_DESCRIPTOR_SECTION_S_SHARED;=0D - break;=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_WRITE_THROUGH (1);=0D - break;=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_DEVICE (1);=0D - break;=0D - case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_UNCACHED (1);=0D + Attributes =3D TT_DESCRIPTOR_SECTION_UNCACHED;=0D break;=0D default:=0D - Attributes =3D TT_DESCRIPTOR_SECTION_UNCACHED (0);=0D + Attributes =3D TT_DESCRIPTOR_SECTION_UNCACHED;=0D break;=0D }=0D =0D --=20 2.39.1