From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f54.google.com (mail-pj1-f54.google.com [209.85.216.54]) by mx.groups.io with SMTP id smtpd.web11.24541.1676923746414553934 for ; Mon, 20 Feb 2023 12:09:06 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=m7SCP5fV; spf=pass (domain: ventanamicro.com, ip: 209.85.216.54, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pj1-f54.google.com with SMTP id v3-20020a17090a6b0300b002341a2656e5so2385058pjj.1 for ; Mon, 20 Feb 2023 12:09:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=SoyZb3htCdSGO6vs+oC3U5ilLIw5SE82lolh8pHywCU=; b=m7SCP5fVC2VJUMUnkZ7rbKKV93lzbe9VYfoq0TGjh6IyX6lGV5n9sroKMhaszYYYoj jM8p0y0+Es69ddfxrRXA35swpej2iKEqAvPc4RAa1cIh+8qZXZ8X70yqJAI/nUU2YXQZ TNHdfSfiOmV0tCva/yL2iUb5iiTBDM70WoBQb2lWyXx+ylesjRl7rHtZWXFDNlHKExvq mPoT9B9ytrrWmonM+H6Vjy8DbQB3x2HAsvJijzuv81kJRIpv/Tpi+VVQbdrRQHo2anPl QKX2WMfboOhfys9qvlqJUgF4mnDo/46tdo0yOWhhRU0JU0XkJXJ4tSEWIDNlRW0NZjl1 j6Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=SoyZb3htCdSGO6vs+oC3U5ilLIw5SE82lolh8pHywCU=; b=btzYA7224+GNTS7AH6bkURZu+rq68NkWNOcasV8NsycZxouo+25Vt/EmPzJZLtzx7P InC7AhbSLMa/6H4RkNzdUZl5Y7GLd9FGLKS/W70Zc38gvyyfbxMx+aKbSoIrHwBhAOia LvJtV/N0k8ifLggTnnqgrqbibl1ZaHL+kqQKbfLPqYZ656RIQRO5e5CLraiNMNgV+vvV lF6pjyFgaIcfK5j6NCoKffr5V5y9dMciRJc1eGw51NT/Xu1+YK7SD35CJ6N9GUCHc810 /Li4GY9wiX8QbWTX5s8/gNz5EriBXZuzL+3pJpzZB4Vk43Rt72HUVG+0LB8G2AV64uZa oNTw== X-Gm-Message-State: AO0yUKXWaOC8+a+zWmtlkzyf+57s1OJEKlmXlK25mLxn5LrMdxkSEt7A 4IU/Jde42tjwo6vt2eP2Ez2QMxnMrMLU1fDc X-Google-Smtp-Source: AK7set8CVRpywoB5cQzzAHNcaq9YEasVc6AhDnUoxRD1Df2sZ2Axmw8wuT+bMUgJueV3nc4txHIX4A== X-Received: by 2002:a05:6a20:a10b:b0:cb:b4e:b560 with SMTP id q11-20020a056a20a10b00b000cb0b4eb560mr1433966pzk.53.1676923745476; Mon, 20 Feb 2023 12:09:05 -0800 (PST) Return-Path: Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id d9-20020a631d09000000b004e63aa44474sm1662661pgd.33.2023.02.20.12.09.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Feb 2023 12:09:05 -0800 (PST) From: "Sunil V L" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Jiewen Yao , Jordan Justen , Gerd Hoffmann , Andrei Warkentin , Heinrich Schuchardt Subject: [PATCH 1/1] OvmfPkg/RiscVVirt: Fix for SCT memory allocation test case failure. Date: Tue, 21 Feb 2023 01:39:01 +0530 Message-Id: <20230220200901.2293940-1-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The stack doesn't grow downwards but upwards for RISC-V. Hence, fix the UEFI memory range calculation by including the correct stack memory range. Without this fix, SCT hangs in MemoryAllocation test cases which call AllocateAddress(). Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Cc: Andrei Warkentin Reported-by: Heinrich Schuchardt Signed-off-by: Sunil V L --- OvmfPkg/RiscVVirt/Sec/SecMain.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.c b/OvmfPkg/RiscVVirt/Sec/SecMain.c index 054e49ef0c1e..0e1f9b891af9 100644 --- a/OvmfPkg/RiscVVirt/Sec/SecMain.c +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.c @@ -54,7 +54,7 @@ SecStartup ( EFI_RISCV_FIRMWARE_CONTEXT FirmwareContext; EFI_STATUS Status; UINT64 UefiMemoryBase; - UINT64 StackBase; + UINT64 StackEnd; // // Report Status Code to indicate entering SEC core @@ -71,15 +71,16 @@ SecStartup ( FirmwareContext.FlattenedDeviceTree = (UINT64)DeviceTreeAddress; SetFirmwareContextPointer (&FirmwareContext); - StackBase = (UINT64)FixedPcdGet32 (PcdOvmfSecPeiTempRamBase); - UefiMemoryBase = StackBase + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) - SIZE_32MB; + StackEnd = (UINT64)FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize); + UefiMemoryBase = StackEnd - SIZE_32MB; // Declare the PI/UEFI memory region HobList = HobConstructor ( (VOID *)UefiMemoryBase, SIZE_32MB, (VOID *)UefiMemoryBase, - (VOID *)StackBase // The top of the UEFI Memory is reserved for the stacks + (VOID *)StackEnd // The top of the UEFI Memory is reserved for the stacks ); PrePeiSetHobList (HobList); -- 2.34.1