From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:17 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ZNH/eT8Y; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: andrei.warkentin@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677196517; x=1708732517; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d0ScP2/TbdyECYVV9XTbXu41lcAMie+BCsPRHEcSt8c=; b=ZNH/eT8YirRVGQrc7iz/nZTQf4PNgNdwYqdRG1GzwD3eEDj/46gNwv2o L1thOVheIiBzBJtqe8Ldqq4EuIzTtpjXo80HHe1iw0xMS9JR2sOjq9HSM SsyJxXd14xN2QLS7kA7eEXm2P51QX6qSzeBU0gTZIIktczeCEQKoVd8Qs +d0LCSbsFch7i5MPUVL143Ju6YKOBLbxIHxLS/SELWfmt33dQdERoAXlT KqMliDfJheVuFvL2yzXiEG2aG68eOef+n4PvTNEv/m0fegDtPDUkMJ750 x/Nh0OhHNLORWUF7JKOrWMg7IjgAN7KPNImQ2W5uGcRJX4goPEghVMVqw Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549998" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549998" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:17 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984553" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984553" Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:16 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Sunil V L , Daniel Schaefer Subject: [PATCH 6/7] [PATCH v2] UefiCpuPkg: CpuTimerDxeRiscV64: fix tick duration accounting Date: Thu, 23 Feb 2023 17:54:53 -0600 Message-Id: <20230223235454.23556-7-andrei.warkentin@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The TimerDxe implementation doesn't account for the physical time passed due to timer handler execution or (perhaps even more importantly) time spent with interrupts masked. Other implementations (e.g. like the Arm one) do. If the timer tick is always incremented at a fixed rate, then you can slow down UEFI's perception of time by running long sections of code in a critical section. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Andrei Warkentin --- UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 33 +++++++++++++++------------ 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c index db153f715e60..50f57a9780f0 100644 --- a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c +++ b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c @@ -40,7 +40,8 @@ STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction; // // The current period of the timer interrupt // -STATIC UINT64 mTimerPeriod = 0; +STATIC UINT64 mTimerPeriod = 0; +STATIC UINT64 mLastPeriodStart = 0; /** Timer Interrupt Handler. @@ -56,25 +57,31 @@ TimerInterruptHandler ( ) { EFI_TPL OriginalTPL; - UINT64 RiscvTimer; + UINT64 PeriodStart = RiscVReadTimer (); OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); if (mTimerNotifyFunction != NULL) { - mTimerNotifyFunction (mTimerPeriod); + // + // For any number of reasons, the ticks could be coming + // in slower than mTimerPeriod. For example, some code + // is doing a *lot* of stuff inside an EFI_TPL_HIGH + // critical section, and this should not cause the EFI + // time to increment slower. So when we take an interrupt, + // account for the actual time passed. + // + mTimerNotifyFunction (PeriodStart - mLastPeriodStart); } - RiscVDisableTimerInterrupt (); // Disable SMode timer int - RiscVClearPendingTimerInterrupt (); if (mTimerPeriod == 0) { + RiscVDisableTimerInterrupt (); gBS->RestoreTPL (OriginalTPL); - RiscVDisableTimerInterrupt (); // Disable SMode timer int return; } - RiscvTimer = RiscVReadTimer (); - SbiSetTimer (RiscvTimer += mTimerPeriod); + mLastPeriodStart = PeriodStart; + SbiSetTimer (PeriodStart += mTimerPeriod); + RiscVEnableTimerInterrupt (); // enable SMode timer int gBS->RestoreTPL (OriginalTPL); - RiscVEnableTimerInterrupt (); // enable SMode timer int } /** @@ -154,8 +161,6 @@ TimerDriverSetTimerPeriod ( IN UINT64 TimerPeriod ) { - UINT64 RiscvTimer; - DEBUG ((DEBUG_INFO, "TimerDriverSetTimerPeriod(0x%lx)\n", TimerPeriod)); if (TimerPeriod == 0) { @@ -164,9 +169,9 @@ TimerDriverSetTimerPeriod ( return EFI_SUCCESS; } - mTimerPeriod = TimerPeriod / 10; // convert unit from 100ns to 1us - RiscvTimer = RiscVReadTimer (); - SbiSetTimer (RiscvTimer + mTimerPeriod); + mTimerPeriod = TimerPeriod / 10; // convert unit from 100ns to 1us + mLastPeriodStart = RiscVReadTimer (); + SbiSetTimer (mLastPeriodStart + mTimerPeriod); mCpu->EnableInterrupt (mCpu); RiscVEnableTimerInterrupt (); // enable SMode timer int -- 2.25.1