From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:24 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=a//8ivSb; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: yuanhao.xie@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677651023; x=1709187023; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c3SldQ2EWTXU9YLBGDllGv43YQy6CmoDFBM4h5JyC8g=; b=a//8ivSb9ofErMX3N5Ec66Xr+bvt97UzmS70pT/Pt/nURCqGIYXkVGAp jkSOF7A8D9k1FFXJZK89eHQ9cqEEOGGrCshsz6ahDF1wTZKJx76TJWLzM KLum9sojLT1dKZvzt6rsH67jiNlJG0rTtR3vcTdGCZBKfdwvVc7i3MHcw TbfHm7/WfqxYvz/2hTDeMo6o9l8eP6Qog4NzGw4dlx/Tm3QuzQwmXV0r7 /LZFuLMUZjiKGT51LGoVJVS5bDRRfnfXNLJCoGWEieWCb/4OjxXp7/EuI uEAaACrQSAHG/9il5v4bX3UsLevvkSTP/P1GxB/6Du+A8dsMTddIQuVwb w==; X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590756" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590756" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:23 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533765" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533765" Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:22 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [Patch V4 7/8] UefiCpuPkg: Rename AsmRelocateApLoopStart. Date: Wed, 1 Mar 2023 14:09:53 +0800 Message-Id: <20230301060954.1464-8-yuanhao.xie@intel.com> X-Mailer: git-send-email 2.36.1.windows.1 In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Rename AsmRelocateApLoopStart to AsmRelocateApLoopStartAmdSev Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie --- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 4 ++-- UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 4 ++-- UefiCpuPkg/Library/MpInitLib/MpLib.h | 8 ++++---- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 40 ++++++++++++++++++++-------------------- 4 files changed, 28 insertions(+), 28 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c index d292277d10..330676b700 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -547,8 +547,8 @@ InitMpGlobalData ( // 64-bit AMD processors with SEV-ES // Address = BASE_4GB - 1; - ApLoopFunc = AddressMap->RelocateApLoopFuncAddress; - ApLoopFuncSize = AddressMap->RelocateApLoopFuncSize; + ApLoopFunc = AddressMap->RelocateApLoopFuncAddressAmdSev; + ApLoopFuncSize = AddressMap->RelocateApLoopFuncSizeAmdSev; } else { // // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or 64-bit AMD processors without SEV-ES diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc index 09c1817426..72af196513 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc @@ -26,8 +26,8 @@ struc MP_ASSEMBLY_ADDRESS_MAP .RendezvousFunnelSize CTYPE_UINTN 1 .RelocateApLoopFuncAddressGeneric CTYPE_UINTN 1 .RelocateApLoopFuncSizeGeneric CTYPE_UINTN 1 - .RelocateApLoopFuncAddress CTYPE_UINTN 1 - .RelocateApLoopFuncSize CTYPE_UINTN 1 + .RelocateApLoopFuncAddressAmdSev CTYPE_UINTN 1 + .RelocateApLoopFuncSizeAmdSev CTYPE_UINTN 1 .ModeTransitionOffset CTYPE_UINTN 1 .SwitchToRealNoNxOffset CTYPE_UINTN 1 .SwitchToRealPM16ModeOffset CTYPE_UINTN 1 diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h index e137545fc6..6f235dcf6d 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -179,8 +179,8 @@ typedef struct { UINTN RendezvousFunnelSize; UINT8 *RelocateApLoopFuncAddressGeneric; UINTN RelocateApLoopFuncSizeGeneric; - UINT8 *RelocateApLoopFuncAddress; - UINTN RelocateApLoopFuncSize; + UINT8 *RelocateApLoopFuncAddressAmdSev; + UINTN RelocateApLoopFuncSizeAmdSev; UINTN ModeTransitionOffset; UINTN SwitchToRealNoNxOffset; UINTN SwitchToRealPM16ModeOffset; @@ -388,7 +388,7 @@ typedef **/ typedef VOID -(EFIAPI *ASM_RELOCATE_AP_LOOP)( +(EFIAPI *ASM_RELOCATE_AP_LOOP_AMDSEV)( IN BOOLEAN MwaitSupport, IN UINTN ApTargetCState, IN UINTN PmCodeSegment, @@ -429,7 +429,7 @@ AsmExchangeRole ( typedef union { VOID *Data; - ASM_RELOCATE_AP_LOOP AmdSevEntry; // 64-bit AMD Sev processors + ASM_RELOCATE_AP_LOOP_AMDSEV AmdSevEntry; // 64-bit AMD Sev processors ASM_RELOCATE_AP_LOOP_GENERIC GenericEntry; // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or AMD non-Sev processors } RELOCATE_AP_LOOP_ENTRY; diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm index c0d7355c6b..1a64d5681f 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -277,14 +277,14 @@ CProcedureInvoke: %include "AmdSev.nasm" RendezvousFunnelProcEnd: - ;------------------------------------------------------------------------------------- -; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); +; AsmRelocateApLoopAmdSev (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); ;------------------------------------------------------------------------------------- -AsmRelocateApLoopStart: + +AsmRelocateApLoopAmdSevStart: BITS 64 cmp qword [rsp + 56], 0 ; SevEsAPJumpTable - je NoSevEs + je NoSevEsAmdSev ; ; Perform some SEV-ES related setup before leaving 64-bit mode @@ -329,7 +329,7 @@ BITS 64 pop rdx pop rcx -NoSevEs: +NoSevEsAmdSev: cli ; Disable interrupt before switching to 32-bit mode mov rax, [rsp + 40] ; CountTofinish lock dec dword [rax] ; (*CountTofinish)-- @@ -345,7 +345,7 @@ NoSevEs: push rcx ; Save MwaitSupport push rdx ; Save ApTargetCState - lea rax, [PmEntry] ; rax <- The start address of transition code + lea rax, [PmEntryAmdSev] ; rax <- The start address of transition code push r8 push rax @@ -365,10 +365,10 @@ NoSevEs: ; ; Far return into 32-bit mode ; - retfq +o64 retf BITS 32 -PmEntry: +PmEntryAmdSev: mov eax, cr0 btr eax, 31 ; Clear CR0.PG mov cr0, eax ; Disable paging and caches @@ -386,11 +386,11 @@ PmEntry: pop ecx, add esp, 4 -MwaitCheck: +MwaitCheckAmdSev: cmp cl, 1 ; Check mwait-monitor support - jnz HltLoop + jnz HltLoopAmdSev mov ebx, edx ; Save C-State to ebx -MwaitLoop: +MwaitLoopAmdSev: cli mov eax, esp ; Set Monitor Address xor ecx, ecx ; ecx = 0 @@ -399,9 +399,9 @@ MwaitLoop: mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4] shl eax, 4 mwait - jmp MwaitLoop + jmp MwaitLoopAmdSev -HltLoop: +HltLoopAmdSev: pop edx ; PM16CodeSegment add esp, 4 pop ebx ; WakeupBuffer @@ -409,7 +409,7 @@ HltLoop: pop eax ; SevEsAPJumpTable add esp, 4 cmp eax, 0 ; Check for SEV-ES - je DoHlt + je DoHltAmdSev cli ; @@ -439,13 +439,13 @@ BITS 32 retf -DoHlt: +DoHltAmdSev: cli hlt - jmp DoHlt + jmp DoHltAmdSev BITS 64 -AsmRelocateApLoopEnd: +AsmRelocateApLoopAmdSevEnd: ;------------------------------------------------------------------------------------- ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, TopOfApStack, CountTofinish, Cr3); @@ -511,9 +511,9 @@ ASM_PFX(AsmGetAddressMap): lea rax, [AsmRelocateApLoopGenericStart] mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddressGeneric], rax mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSizeGeneric], AsmRelocateApLoopGenericEnd - AsmRelocateApLoopGenericStart - lea rax, [AsmRelocateApLoopStart] - mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], rax - mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart + lea rax, [AsmRelocateApLoopAmdSevStart] + mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddressAmdSev], rax + mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSizeAmdSev], AsmRelocateApLoopAmdSevEnd - AsmRelocateApLoopAmdSevStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], PM16Mode - RendezvousFunnelProcStart -- 2.36.1.windows.1