From: "Andrei Warkentin" <andrei.warkentin@intel.com>
To: devel@edk2.groups.io
Cc: Andrei Warkentin <andrei.warkentin@intel.com>,
Sunil V L <sunilvl@ventanamicro.com>,
Jiewen Yao <jiewen.yao@intel.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>
Subject: [edk2 1/7] OvmfPkg: RiscVVirt: add SATA support
Date: Mon, 6 Mar 2023 15:26:09 -0600 [thread overview]
Message-ID: <20230306212615.7400-2-andrei.warkentin@intel.com> (raw)
In-Reply-To: <20230306212615.7400-1-andrei.warkentin@intel.com>
Tested with a PCIe pass-thru'd AHCI controller.
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
---
OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 7 +++++++
OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 054d511138c3..28d9af4d79b9 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -426,6 +426,13 @@ [Components]
MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ #
+ # SATA
+ #
+ MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+
#
# NVME Driver
#
diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf b/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
index 6072c37af03d..354c9271d10c 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
@@ -137,6 +137,13 @@ [FV.DXEFV]
INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+#
+# SATA
+#
+INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+
#
# NVME Driver
#
--
2.25.1
next prev parent reply other threads:[~2023-03-06 21:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-06 21:26 [edk2 0/7] v3 Assorted fixes to core RISC-V and RiscVVirt Andrei Warkentin
2023-03-06 21:26 ` Andrei Warkentin [this message]
2023-03-06 21:26 ` [edk2 2/7] MdePkg: BasePeCoffLib: Allow AArch64 and x64 images in ImageFormatSupported Andrei Warkentin
2023-03-06 21:26 ` [edk2 3/7] MdePkg: BaseLib: don't log in RISCV InternalSwitchStack Andrei Warkentin
2023-03-06 21:26 ` [edk2 4/7] MdePkg: BaseCpuLib: Fix RISCV CpuSleep symbol name Andrei Warkentin
2023-03-06 21:26 ` [edk2 5/7] MdeModulePkg: Dxe: add RISCV64 to mMachineTypeInfo Andrei Warkentin
2023-03-06 21:26 ` [edk2 6/7] [PATCH v2] UefiCpuPkg: CpuTimerDxeRiscV64: fix tick duration accounting Andrei Warkentin
2023-03-06 21:26 ` [edk2 7/7] [PATCH v3] UefiCpuPkg: BaseRiscV64CpuExceptionHandlerLib: clean up exception handling Andrei Warkentin
2023-03-08 18:37 ` [edk2-devel] [edk2 0/7] v3 Assorted fixes to core RISC-V and RiscVVirt Sunil V L
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230306212615.7400-2-andrei.warkentin@intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox