From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.1898.1678137984252750213 for ; Mon, 06 Mar 2023 13:26:29 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=Dkuc9SDi; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: andrei.warkentin@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678137989; x=1709673989; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z2zHSr5OzV/58bPWBlm0zfYXcM3xanaPBXtO6Pqdf+g=; b=Dkuc9SDiaT/D5F+wxdwy3rgGwkol8p19Jr5i53UAJ+xfVkMA/ByfjF9E F9HUQbyPyMaSgKWanYTh1CVmjS8XPFo6ZnxeQpO7RfRFsqgLmg1IEzcTS 3SZmwfDWOA3sSRc6szPgGxc9+cFeMFYwPZAAQ6to90vwrU23JbQwuTwxC dCn2WFOq6WeVTb6rPzawL3ZOYuFonZf1IaEyzRG6KXdyF6Wk7aWQwepkw cHEf/SkdYZK2pNA1ODA7DHvV6sm3IVCeBZPLo0ChnZVe4KxrDgcrQmODv Kv2yJ6lU/Tin+XYtmFKIuPkbCN/hNMlNRSTpxVl9Yv8qUm+n6gmhDmK19 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="315335591" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="315335591" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2023 13:26:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="819444273" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="819444273" Received: from awarkent-mobl1.amr.corp.intel.com ([10.212.90.17]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2023 13:26:29 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Daniel Schaefer , Sunil V L Subject: [edk2 6/7] [PATCH v2] UefiCpuPkg: CpuTimerDxeRiscV64: fix tick duration accounting Date: Mon, 6 Mar 2023 15:26:14 -0600 Message-Id: <20230306212615.7400-7-andrei.warkentin@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230306212615.7400-1-andrei.warkentin@intel.com> References: <20230306212615.7400-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The TimerDxe implementation doesn't account for the physical time passed due to timer handler execution or (perhaps even more importantly) time spent with interrupts masked. Other implementations (e.g. like the Arm one) do. If the timer tick is always incremented at a fixed rate, then you can slow down UEFI's perception of time by running long sections of code in a critical section. Cc: Daniel Schaefer Reviewed-by: Sunil V L Signed-off-by: Andrei Warkentin --- UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 33 +++++++++++--------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c index db153f715e60..50f57a9780f0 100644 --- a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c +++ b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c @@ -40,7 +40,8 @@ STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction; // // The current period of the timer interrupt // -STATIC UINT64 mTimerPeriod = 0; +STATIC UINT64 mTimerPeriod = 0; +STATIC UINT64 mLastPeriodStart = 0; /** Timer Interrupt Handler. @@ -56,25 +57,31 @@ TimerInterruptHandler ( ) { EFI_TPL OriginalTPL; - UINT64 RiscvTimer; + UINT64 PeriodStart = RiscVReadTimer (); OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); if (mTimerNotifyFunction != NULL) { - mTimerNotifyFunction (mTimerPeriod); + // + // For any number of reasons, the ticks could be coming + // in slower than mTimerPeriod. For example, some code + // is doing a *lot* of stuff inside an EFI_TPL_HIGH + // critical section, and this should not cause the EFI + // time to increment slower. So when we take an interrupt, + // account for the actual time passed. + // + mTimerNotifyFunction (PeriodStart - mLastPeriodStart); } - RiscVDisableTimerInterrupt (); // Disable SMode timer int - RiscVClearPendingTimerInterrupt (); if (mTimerPeriod == 0) { + RiscVDisableTimerInterrupt (); gBS->RestoreTPL (OriginalTPL); - RiscVDisableTimerInterrupt (); // Disable SMode timer int return; } - RiscvTimer = RiscVReadTimer (); - SbiSetTimer (RiscvTimer += mTimerPeriod); + mLastPeriodStart = PeriodStart; + SbiSetTimer (PeriodStart += mTimerPeriod); + RiscVEnableTimerInterrupt (); // enable SMode timer int gBS->RestoreTPL (OriginalTPL); - RiscVEnableTimerInterrupt (); // enable SMode timer int } /** @@ -154,8 +161,6 @@ TimerDriverSetTimerPeriod ( IN UINT64 TimerPeriod ) { - UINT64 RiscvTimer; - DEBUG ((DEBUG_INFO, "TimerDriverSetTimerPeriod(0x%lx)\n", TimerPeriod)); if (TimerPeriod == 0) { @@ -164,9 +169,9 @@ TimerDriverSetTimerPeriod ( return EFI_SUCCESS; } - mTimerPeriod = TimerPeriod / 10; // convert unit from 100ns to 1us - RiscvTimer = RiscVReadTimer (); - SbiSetTimer (RiscvTimer + mTimerPeriod); + mTimerPeriod = TimerPeriod / 10; // convert unit from 100ns to 1us + mLastPeriodStart = RiscVReadTimer (); + SbiSetTimer (mLastPeriodStart + mTimerPeriod); mCpu->EnableInterrupt (mCpu); RiscVEnableTimerInterrupt (); // enable SMode timer int -- 2.25.1