From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web10.3470.1678270139326397803 for ; Wed, 08 Mar 2023 02:09:03 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=NetF4TmL; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678270143; x=1709806143; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xwVnUUItEYIwmHpRFJl/d25cp+BEoPS7jjc497XymDU=; b=NetF4TmLbgp4HvIbVoLOZ7xVXq53avJTTU4vFkKP/noTkGmAqVn/cxj1 8nW/B6fp2apSiO0HYvbE3DgFg+jBS20rg7Z/r7aIzBARgHRxZrhc8+/Rb y9VQ0Hwb4M8AprwbzFybldDQodbZs9jF+nqNmphSkRH8PTwUzNu2LTg+q EPC7dOZdfDVrpc7i0aoKFbYS6a2wbwM8I6NdNmBlp3gSrlwpIsgkztB/B D+iCk0BqpfEL9zWpwTacNPZDvzRZwRpxLMPiDMkvZ7DJrDJRngv2AU7PC KHI4WWzM/Y6OOs31E4I13sPT7gjBvZttabnYwReR0XxuuLVr00vKiiRGo w==; X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="338442687" X-IronPort-AV: E=Sophos;i="5.98,243,1673942400"; d="scan'208";a="338442687" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 02:09:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="745862650" X-IronPort-AV: E=Sophos;i="5.98,243,1673942400"; d="scan'208";a="745862650" Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 02:09:01 -0800 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [Patch V2 05/14] UefiCpuPkg/CpuPageTebleLib: Check Mask and Attr in PageTableMap Date: Wed, 8 Mar 2023 18:07:49 +0800 Message-Id: <20230308100758.669-6-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230308100758.669-1-dun.tan@intel.com> References: <20230308100758.669-1-dun.tan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit When creating new page table or mapping not-present range in existing page table, we need to make sure all the non-reserved fields of input Mask are not 0 and Present field of input Attribute is 1. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c index 0f3d0d684e..56f762a15e 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c @@ -214,6 +214,33 @@ PageTableLibSetPnle ( Pnle->Bits.CacheDisabled = 0; } +/** + Check if any Non-Reserved field of Mask is 0 or Attribute->Bits.Present is 0 + when creating new page table or mapping not-present range. + + @param[in] Attribute The attribute of the linear address range. + @param[in] Mask The mask used for attribute to check. + + @retval RETURN_INVALID_PARAMETER There is 0-value field in Non-Reserved fields of Mask or Attribute->Bits.Present is 0. + @retval RETURN_SUCCESS All Non-Reserved fields of Mask are not 0 and Attribute->Bits.Present is 1. +**/ +RETURN_STATUS +CheckMaskAndAttrForNotPresentEntry ( + IN IA32_MAP_ATTRIBUTE *Attribute, + IN IA32_MAP_ATTRIBUTE *Mask + ) +{ + if ((Attribute->Bits.Present == 0) || (Mask->Bits.Present == 0) || (Mask->Bits.ReadWrite == 0) || + (Mask->Bits.UserSupervisor == 0) || (Mask->Bits.WriteThrough == 0) || (Mask->Bits.CacheDisabled == 0) || + (Mask->Bits.Accessed == 0) || (Mask->Bits.Dirty == 0) || (Mask->Bits.Pat == 0) || (Mask->Bits.Global == 0) || + (Mask->Bits.PageTableBaseAddress == 0) || (Mask->Bits.ProtectionKey == 0) || (Mask->Bits.Nx == 0)) + { + return RETURN_INVALID_PARAMETER; + } + + return RETURN_SUCCESS; +} + /** Update page table to map [LinearAddress, LinearAddress + Length) with specified attribute in the specified level. @@ -259,6 +286,7 @@ PageTableLibMapInLevel ( UINTN Index; IA32_PAGING_ENTRY *PagingEntry; UINTN PagingEntryIndex; + UINTN PagingEntryIndexLimit; IA32_PAGING_ENTRY *CurrentPagingEntry; UINT64 RegionLength; UINT64 SubLength; @@ -302,6 +330,14 @@ PageTableLibMapInLevel ( // if (ParentPagingEntry->Pce.Present == 0) { + // + // [LinearAddress, LinearAddress + Length] contains not-present range. + // + Status = CheckMaskAndAttrForNotPresentEntry (Attribute, Mask); + if (RETURN_ERROR (Status)) { + return Status; + } + // // The parent entry is CR3 or PML5E/PML4E/PDPTE/PDE. // It does NOT point to an existing page directory. @@ -372,6 +408,23 @@ PageTableLibMapInLevel ( PageTableLibSetPnle (&ParentPagingEntry->Pnle, &NopAttribute, &AllOneMask); } } else { + PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle); + PagingEntryIndexLimit = (BitFieldRead64 (LinearAddress + Length - 1, BitStart + 9, 63) > BitFieldRead64 (LinearAddress + Offset, BitStart + 9, 63)) ? 511 : + (UINTN)BitFieldRead64 (LinearAddress + Length - 1, BitStart, BitStart + 9 - 1); + for (Index = PagingEntryIndex; Index <= PagingEntryIndexLimit; Index++) { + if (PagingEntry[Index].Pce.Present == 0) { + // + // [LinearAddress, LinearAddress + Length] contains not-present range. + // + Status = CheckMaskAndAttrForNotPresentEntry (Attribute, Mask); + if (RETURN_ERROR (Status)) { + return Status; + } + + break; + } + } + // // It's a non-leaf entry // @@ -419,7 +472,6 @@ PageTableLibMapInLevel ( // Update child entries to use restrictive attribute inherited from parent. // e.g.: Set PDE[0-255].ReadWrite = 0 // - PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle); for (Index = 0; Index < 512; Index++) { if (PagingEntry[Index].Pce.Present == 0) { continue; -- 2.31.1.windows.1