From: "Ni, Ray" <ray.ni@intel.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Gerd Hoffmann <kraxel@redhat.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Ahmad Anadani <ahmad.anadani@intel.com>
Subject: [PATCH 3/6] UefiCpuPkg/MtrrLib: Substract TME-MK KEY_ID_BITS from CPU max PA
Date: Wed, 22 Mar 2023 07:56:47 +0800 [thread overview]
Message-ID: <20230321235650.675-4-ray.ni@intel.com> (raw)
In-Reply-To: <20230321235650.675-1-ray.ni@intel.com>
CPUID enumeration of MAX_PA is unaffected by TME-MK activation and
will continue to report the maximum physical address bits available
for software to use, irrespective of the number of KeyID bits.
So, we need to check if TME is enabled and adjust the PA size
accordingly.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ahmad Anadani <ahmad.anadani@intel.com>
---
UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 24 ++++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
index e5c862c83d..a66357e305 100644
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
@@ -756,8 +756,11 @@ MtrrLibInitializeMtrrMask (
OUT UINT64 *MtrrValidAddressMask
)
{
- UINT32 MaxExtendedFunction;
- CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+ UINT32 MaxExtendedFunction;
+ CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+ UINT32 MaxFunction;
+ CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX ExtendedFeatureFlagsEcx;
+ MSR_IA32_TME_ACTIVATE_REGISTER TmeActivate;
AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
@@ -767,6 +770,23 @@ MtrrLibInitializeMtrrMask (
VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
}
+ //
+ // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue
+ // to report the maximum physical address bits available for software to use,
+ // irrespective of the number of KeyID bits.
+ // So, we need to check if TME is enabled and adjust the PA size accordingly.
+ //
+ AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);
+ if (MaxFunction >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {
+ AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &ExtendedFeatureFlagsEcx.Uint32, NULL);
+ if (ExtendedFeatureFlagsEcx.Bits.TME_EN == 1) {
+ TmeActivate.Uint64 = AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);
+ if (TmeActivate.Bits.TmeEnable == 1) {
+ VirPhyAddressSize.Bits.PhysicalAddressBits -= TmeActivate.Bits.MkTmeKeyidBits;
+ }
+ }
+ }
+
*MtrrValidBitsMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
*MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
}
--
2.39.1.windows.1
next prev parent reply other threads:[~2023-03-21 23:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-21 23:56 [PATCH 0/6] Substract TME-MK KEY_ID_BITS from CPU max PA Ni, Ray
2023-03-21 23:56 ` [PATCH 1/6] MdePkg: Add TME-MK related CPUID and MSR definitions Ni, Ray
2023-03-29 22:14 ` Michael D Kinney
2023-03-29 22:24 ` Michael D Kinney
2023-03-21 23:56 ` [PATCH 2/6] UefiCpuPkg/MtrrTest: Only claim CPUID max leaf as 1 Ni, Ray
2023-03-29 22:22 ` Michael D Kinney
2023-03-21 23:56 ` Ni, Ray [this message]
2023-03-29 22:22 ` [PATCH 3/6] UefiCpuPkg/MtrrLib: Substract TME-MK KEY_ID_BITS from CPU max PA Michael D Kinney
2023-03-21 23:56 ` [PATCH 4/6] UefiCpuPkg/CpuDxe: Refactor to use CPUID definitions Ni, Ray
2023-03-29 22:22 ` Michael D Kinney
2023-03-21 23:56 ` [PATCH 5/6] UefiCpuPkg/CpuDxe: Substract TME-MK KEY_ID_BITS from CPU max PA Ni, Ray
2023-03-29 22:23 ` Michael D Kinney
2023-03-21 23:56 ` [PATCH 6/6] UefiCpuPkg/MtrrTest: Add test cases for TME-MK enable case Ni, Ray
2023-03-29 22:23 ` Michael D Kinney
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