From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web10.30789.1679443023007772831 for ; Tue, 21 Mar 2023 16:57:03 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=VtkXVRpo; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: ray.ni@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679443023; x=1710979023; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=guSjsJdL10ZQ/byT1nQGqpfVIGnNy/YvJYAt222P4nk=; b=VtkXVRpom+CljmHL8ZMZ9dZb/7UoB/EJvTyiDihczMJSLKLzNLixkelN 5vdr53VFfoHIWB5Acw9kmzrN/V0LmtlZJK+I1hlqCHHYsKh6Zl3/3Oah6 +osT6xvRIHZw3NdVgKoQSj94Dav1cEOTx+9oVm0P4EANSa7TRV6Vo3xdu UHCz2BBLBynWMSbIsoCbRpcrtwojM5Ty6sxlzac8vc5jV0f9t1O2Jd82P 6p9SdnrNq/vzjv9Jz1droknBnUxYLfc7ihLRfpxUmomYOSODUW479taSm AFq/YBMl+TnDud8LwkjVJkjW5CsJEl0rSlJYGv+ijgr+BMP35BsE+xNdJ g==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="341441514" X-IronPort-AV: E=Sophos;i="5.98,280,1673942400"; d="scan'208";a="341441514" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2023 16:57:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="805627742" X-IronPort-AV: E=Sophos;i="5.98,280,1673942400"; d="scan'208";a="805627742" Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by orsmga004.jf.intel.com with ESMTP; 21 Mar 2023 16:56:58 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Rahul Kumar , Gerd Hoffmann , Michael D Kinney , Ahmad Anadani Subject: [PATCH 3/6] UefiCpuPkg/MtrrLib: Substract TME-MK KEY_ID_BITS from CPU max PA Date: Wed, 22 Mar 2023 07:56:47 +0800 Message-Id: <20230321235650.675-4-ray.ni@intel.com> X-Mailer: git-send-email 2.39.1.windows.1 In-Reply-To: <20230321235650.675-1-ray.ni@intel.com> References: <20230321235650.675-1-ray.ni@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue to report the maximum physical address bits available for software to use, irrespective of the number of KeyID bits. So, we need to check if TME is enabled and adjust the PA size accordingly. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Michael D Kinney Cc: Ahmad Anadani --- UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/Mtrr= Lib/MtrrLib.c index e5c862c83d..a66357e305 100644 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c @@ -756,8 +756,11 @@ MtrrLibInitializeMtrrMask ( OUT UINT64 *MtrrValidAddressMask=0D )=0D {=0D - UINT32 MaxExtendedFunction;=0D - CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;=0D + UINT32 MaxExtendedFunction;=0D + CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;=0D + UINT32 MaxFunction;=0D + CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX ExtendedFeatureFlagsEcx;=0D + MSR_IA32_TME_ACTIVATE_REGISTER TmeActivate;=0D =0D AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NUL= L);=0D =0D @@ -767,6 +770,23 @@ MtrrLibInitializeMtrrMask ( VirPhyAddressSize.Bits.PhysicalAddressBits =3D 36;=0D }=0D =0D + //=0D + // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and wi= ll continue=0D + // to report the maximum physical address bits available for software to= use,=0D + // irrespective of the number of KeyID bits.=0D + // So, we need to check if TME is enabled and adjust the PA size accordi= ngly.=0D + //=0D + AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);=0D + if (MaxFunction >=3D CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {=0D + AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &E= xtendedFeatureFlagsEcx.Uint32, NULL);=0D + if (ExtendedFeatureFlagsEcx.Bits.TME_EN =3D=3D 1) {=0D + TmeActivate.Uint64 =3D AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);=0D + if (TmeActivate.Bits.TmeEnable =3D=3D 1) {=0D + VirPhyAddressSize.Bits.PhysicalAddressBits -=3D TmeActivate.Bits.M= kTmeKeyidBits;=0D + }=0D + }=0D + }=0D +=0D *MtrrValidBitsMask =3D LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalA= ddressBits) - 1;=0D *MtrrValidAddressMask =3D *MtrrValidBitsMask & 0xfffffffffffff000ULL;=0D }=0D --=20 2.39.1.windows.1