public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "duntan" <dun.tan@intel.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Rahul Kumar <rahul1.kumar@intel.com>,
	Gerd Hoffmann <kraxel@redhat.com>
Subject: [Patch V4 08/21] UefiCpuPkg/CpuPageTableLib:Add check for Mask and Attr
Date: Thu, 23 Mar 2023 15:40:44 +0800	[thread overview]
Message-ID: <20230323074057.549-9-dun.tan@intel.com> (raw)
In-Reply-To: <20230323074057.549-1-dun.tan@intel.com>

For different usage, check if the combination for Mask and
Attr is valid when creating or updating page table.

1.For non-present range
  1.1Mask.Present is 0 but some other attributes is provided.
     This case is invalid.
  1.2Mask.Present is 1 and Attr.Present is 0. In this case,all
     other attributes should not be provided.
  1.3Mask.Present is 1 and Attr.Present is 1. In this case,all
     attributes should be provided to intialize the attribute.

2.For present range
  2.1Mask.Present is 1 and Attr.Present is 0.In this case, all
     other attributes should not be provided.
All other usage for present range is permitted.
In the mentioned cases, 1.2 and 2.1 can be merged into 1 check.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
---
 UefiCpuPkg/Include/Library/CpuPageTableLib.h         |  2 +-
 UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 79 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 78 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/Include/Library/CpuPageTableLib.h b/UefiCpuPkg/Include/Library/CpuPageTableLib.h
index 5f44ece548..6bda15b5bc 100644
--- a/UefiCpuPkg/Include/Library/CpuPageTableLib.h
+++ b/UefiCpuPkg/Include/Library/CpuPageTableLib.h
@@ -76,7 +76,7 @@ typedef enum {
   @param[in]      Mask           The mask used for attribute. The corresponding field in Attribute is ignored if that in Mask is 0.
 
   @retval RETURN_UNSUPPORTED        PagingMode is not supported.
-  @retval RETURN_INVALID_PARAMETER  PageTable, BufferSize, Attribute or Mask is NULL.
+  @retval RETURN_INVALID_PARAMETER  PageTable, BufferSize, Attribute or Mask is NULL or the combination of Attribute and Mask is invalid.
   @retval RETURN_INVALID_PARAMETER  *BufferSize is not multiple of 4KB.
   @retval RETURN_BUFFER_TOO_SMALL   The buffer is too small for page table creation/updating.
                                     BufferSize is updated to indicate the expected buffer size.
diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
index 76febdd42d..2ad22b333d 100644
--- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
+++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
@@ -215,6 +215,43 @@ PageTableLibSetPnle (
   Pnle->Bits.CacheDisabled = 0;
 }
 
+/**
+  Check if the combination for Attribute and Mask is valid for non-present entry.
+  1.Mask.Present is 0 but some other attributes is provided. This case should be invalid.
+  2.Map non-present range to present. In this case, all attributes should be provided.
+
+  @param[in] Attribute    The attribute of the linear address range.
+  @param[in] Mask         The mask used for attribute to check.
+
+  @retval RETURN_INVALID_PARAMETER    The combination for Attribute and Mask is invalid.
+  @retval RETURN_SUCCESS              The combination for Attribute and Mask is valid.
+**/
+RETURN_STATUS
+IsAttributesAndMaskValidForNonPresentEntry (
+  IN     IA32_MAP_ATTRIBUTE  *Attribute,
+  IN     IA32_MAP_ATTRIBUTE  *Mask
+  )
+{
+  if ((Mask->Bits.Present == 1) && (Attribute->Bits.Present == 1)) {
+    //
+    // Creating new page table or remapping non-present range to present.
+    //
+    if ((Mask->Bits.ReadWrite == 0) || (Mask->Bits.UserSupervisor == 0) || (Mask->Bits.WriteThrough == 0) || (Mask->Bits.CacheDisabled == 0) ||
+        (Mask->Bits.Accessed == 0) || (Mask->Bits.Dirty == 0) || (Mask->Bits.Pat == 0) || (Mask->Bits.Global == 0) ||
+        (Mask->Bits.PageTableBaseAddress == 0) || (Mask->Bits.ProtectionKey == 0) || (Mask->Bits.Nx == 0))
+    {
+      return RETURN_INVALID_PARAMETER;
+    }
+  } else if ((Mask->Bits.Present == 0) && (Mask->Uint64 > 1)) {
+    //
+    // Only change other attributes for non-present range is not permitted.
+    //
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  return RETURN_SUCCESS;
+}
+
 /**
   Update page table to map [LinearAddress, LinearAddress + Length) with specified attribute in the specified level.
 
@@ -237,6 +274,7 @@ PageTableLibSetPnle (
                                     when a new physical base address is set.
   @param[in]      Mask              The mask used for attribute. The corresponding field in Attribute is ignored if that in Mask is 0.
 
+  @retval RETURN_INVALID_PARAMETER  The combination of Attribute and Mask for non-present entry is invalid.
   @retval RETURN_SUCCESS            PageTable is created/updated successfully.
 **/
 RETURN_STATUS
@@ -260,6 +298,7 @@ PageTableLibMapInLevel (
   UINTN               Index;
   IA32_PAGING_ENTRY   *PagingEntry;
   UINTN               PagingEntryIndex;
+  UINTN               PagingEntryIndexEnd;
   IA32_PAGING_ENTRY   *CurrentPagingEntry;
   UINT64              RegionLength;
   UINT64              SubLength;
@@ -306,6 +345,14 @@ PageTableLibMapInLevel (
   //
 
   if (ParentPagingEntry->Pce.Present == 0) {
+    //
+    // [LinearAddress, LinearAddress + Length] contains non-present range.
+    //
+    Status = IsAttributesAndMaskValidForNonPresentEntry (Attribute, Mask);
+    if (RETURN_ERROR (Status)) {
+      return Status;
+    }
+
     //
     // The parent entry is CR3 or PML5E/PML4E/PDPTE/PDE.
     // It does NOT point to an existing page directory.
@@ -380,6 +427,27 @@ PageTableLibMapInLevel (
       ParentPagingEntry->Uint64 = ((UINTN)(VOID *)PagingEntry) | (ParentPagingEntry->Uint64 & (~IA32_PE_BASE_ADDRESS_MASK_40));
     }
   } else {
+    //
+    // If (LinearAddress + Length - 1) is not in the same ParentPagingEntry with (LinearAddress + Offset), then the remaining child PagingEntry
+    // starting from PagingEntryIndex of ParentPagingEntry is all covered by [LinearAddress + Offset, LinearAddress + Length - 1].
+    //
+    PagingEntryIndexEnd = (BitFieldRead64 (LinearAddress + Length - 1, BitStart + 9, 63) != BitFieldRead64 (LinearAddress + Offset, BitStart + 9, 63)) ? 511 :
+                          (UINTN)BitFieldRead64 (LinearAddress + Length - 1, BitStart, BitStart + 9 - 1);
+    PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle);
+    for (Index = PagingEntryIndex; Index <= PagingEntryIndexEnd; Index++) {
+      if (PagingEntry[Index].Pce.Present == 0) {
+        //
+        // [LinearAddress, LinearAddress + Length] contains non-present range.
+        //
+        Status = IsAttributesAndMaskValidForNonPresentEntry (Attribute, Mask);
+        if (RETURN_ERROR (Status)) {
+          return Status;
+        }
+
+        break;
+      }
+    }
+
     //
     // It's a non-leaf entry
     //
@@ -427,7 +495,6 @@ PageTableLibMapInLevel (
         // Update child entries to use restrictive attribute inherited from parent.
         // e.g.: Set PDE[0-255].ReadWrite = 0
         //
-        PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle);
         for (Index = 0; Index < 512; Index++) {
           if (PagingEntry[Index].Pce.Present == 0) {
             continue;
@@ -553,7 +620,7 @@ PageTableLibMapInLevel (
   @param[in]      Mask           The mask used for attribute. The corresponding field in Attribute is ignored if that in Mask is 0.
 
   @retval RETURN_UNSUPPORTED        PagingMode is not supported.
-  @retval RETURN_INVALID_PARAMETER  PageTable, BufferSize, Attribute or Mask is NULL.
+  @retval RETURN_INVALID_PARAMETER  PageTable, BufferSize, Attribute or Mask is NULL or the combination of Attribute and Mask is invalid.
   @retval RETURN_INVALID_PARAMETER  *BufferSize is not multiple of 4KB.
   @retval RETURN_BUFFER_TOO_SMALL   The buffer is too small for page table creation/updating.
                                     BufferSize is updated to indicate the expected buffer size.
@@ -615,6 +682,14 @@ PageTableMap (
     return RETURN_INVALID_PARAMETER;
   }
 
+  //
+  // If to map [LinearAddress, LinearAddress + Length] as non-present,
+  // all attributes except Present should not be provided.
+  //
+  if ((Attribute->Bits.Present == 0) && (Mask->Bits.Present == 1) && (Mask->Uint64 > 1)) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
   MaxLeafLevel     = (IA32_PAGE_LEVEL)(UINT8)PagingMode;
   MaxLevel         = (IA32_PAGE_LEVEL)(UINT8)(PagingMode >> 8);
   MaxLinearAddress = LShiftU64 (1, 12 + MaxLevel * 9);
-- 
2.31.1.windows.1


  parent reply	other threads:[~2023-03-23  7:41 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-23  7:40 [Patch V4 00/21] Fix issues in CpuPageTableLib duntan
2023-03-23  7:40 ` [Patch V4 01/21] UefiCpuPkg/CpuPageTableLib: Remove unneeded 'if' condition duntan
2023-03-23  7:40 ` [Patch V4 02/21] UefiCpuPkg/CpuPageTableLib: Add check for input Length duntan
2023-03-23 12:20   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 03/21] UefiCpuPkg/CpuPageTableLib:Initialize some LocalVariable at beginning duntan
2023-03-23 12:26   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 04/21] UefiCpuPkg/CpuPageTableLib: Fix the non-1:1 mapping issue duntan
2023-03-23 12:29   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 05/21] UefiCpuPkg/CpuPageTableLib:Clear PageSize bit(Bit7) for non-leaf duntan
2023-03-23 12:29   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 06/21] UefiCpuPkg/CpuPageTableLib: Fix issue when splitting leaf entry duntan
2023-03-23 12:35   ` Ni, Ray
     [not found]   ` <174F0C7EF4E09C53.19937@groups.io>
2023-03-24  2:19     ` [edk2-devel] " Ni, Ray
2023-03-23  7:40 ` [Patch V4 07/21] UefiCpuPkg/MpInitLib: Add code to initialize MapMask duntan
2023-03-23 12:37   ` Ni, Ray
2023-03-23  7:40 ` duntan [this message]
2023-03-23 12:52   ` [Patch V4 08/21] UefiCpuPkg/CpuPageTableLib:Add check for Mask and Attr Ni, Ray
2023-03-24  1:55     ` duntan
2023-03-23  7:40 ` [Patch V4 09/21] UefiCpuPkg/CpuPageTableLib: Add manual test to check " duntan
2023-03-23 12:57   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 10/21] UefiCpuPkg/CpuPageTableLib:Modify RandomBoolean() in RandomTest duntan
2023-03-23 12:59   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 11/21] UefiCpuPkg/CpuPageTableLib:Modify RandomTest to check Mask/Attr duntan
2023-03-23 13:11   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 12/21] UefiCpuPkg/CpuPageTableLib: Enable non-1:1 mapping in random test duntan
2023-03-23  7:40 ` [Patch V4 13/21] UefiCpuPkg/CpuPageTableLib: Add OUTPUT IsModified parameter duntan
2023-03-23 13:20   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 14/21] UefiCpuPkg/CpuPageTableLib: Modify RandomTest to check IsModified duntan
2023-03-23 13:23   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 15/21] UefiCpuPkg: Fix IA32 build failure in CpuPageTableLib.inf duntan
2023-03-23 13:25   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 16/21] UefiCpuPkg: Modify UnitTest code since tested API is changed duntan
2023-03-23  7:40 ` [Patch V4 17/21] UefiCpuPkg/CpuPageTableLib: Add check for page table creation duntan
2023-03-23 13:29   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 18/21] UefiCpuPkg: Combine branch for non-present and leaf ParentEntry duntan
2023-03-23 13:32   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 19/21] UefiCpuPkg/CpuPageTableLib: Enable PAE paging duntan
2023-03-23 13:38   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 20/21] UefiCpuPkg/CpuPageTableLib: Add RandomTest for " duntan
2023-03-23 13:40   ` Ni, Ray
2023-03-23  7:40 ` [Patch V4 21/21] UefiCpuPkg/CpuPageTableLib: Reduce the number of random tests duntan
2023-03-23 13:40   ` Ni, Ray
2023-03-23  9:13 ` [edk2-devel] [Patch V4 00/21] Fix issues in CpuPageTableLib Gerd Hoffmann
2023-03-23  9:16   ` duntan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230323074057.549-9-dun.tan@intel.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox