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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT012.mail.protection.outlook.com (10.13.175.192) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6222.22 via Frontend Transport; Fri, 24 Mar 2023 03:16:24 +0000 Received: from TPE-L1-ABNCHANG.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 23 Mar 2023 22:16:21 -0500 From: "Chang, Abner" To: CC: Michael D Kinney , Liming Gao , Zhiguang Liu , "Nickle Wang" , Igor Kulchytskyy , Isaac Oram , Abdul Lateef Attar Subject: [PATCH v4] MdePkg/Include: Add IPMI KCS definitions Date: Fri, 24 Mar 2023 11:15:54 +0800 Message-ID: <20230324031554.264-1-abner.chang@amd.com> X-Mailer: git-send-email 2.37.1.windows.1 MIME-Version: 1.0 Return-Path: Abner.Chang@amd.com X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT012:EE_|SJ2PR12MB8691:EE_ X-MS-Office365-Filtering-Correlation-Id: bc3ffa59-0335-4da2-d5e1-08db2c16261b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2023 03:16:24.1912 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bc3ffa59-0335-4da2-d5e1-08db2c16261b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8691 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Abner Chang BZ #4354 This change adds definitions for IPMI KCS. Spec ref: https://www.intel.com/content/www/us/en/products/docs/servers/ipmi/ipmi-sec= ond-gen-interface-spec-v2-rev1-1.html Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Nickle Wang Cc: Igor Kulchytskyy Cc: Isaac Oram Cc: Abdul Lateef Attar Acked-by: Isaac Oram --- MdePkg/MdePkg.dec | 6 ++ MdePkg/Include/IndustryStandard/IpmiKcs.h | 76 +++++++++++++++++++++++ 2 files changed, 82 insertions(+) create mode 100644 MdePkg/Include/IndustryStandard/IpmiKcs.h diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 2d643bede1d..5cf04bc0cb6 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -9,6 +9,7 @@ # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP
# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
# Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -2342,6 +2343,11 @@ # @Prompt Memory Address of GuidedExtractHandler Table. gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|0x1000000|U= INT64|0x30001015 =20 + ## This value is the IPMI KCS Interface I/O base address used to transmi= t IPMI commands. + # The value of 0xca2 is the default I/O base address defined in IPMI sp= ecification. + # @Prompt IPMI KCS Interface I/O Base Address + gEfiMdePkgTokenSpaceGuid.PcdIpmiKcsIoBaseAddress|0xca2|UINT16|0x00000031 + [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## This value is used to set the base address of PCI express hierarchy. # @Prompt PCI Express Base Address. diff --git a/MdePkg/Include/IndustryStandard/IpmiKcs.h b/MdePkg/Include/Ind= ustryStandard/IpmiKcs.h new file mode 100644 index 00000000000..1e1be787617 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/IpmiKcs.h @@ -0,0 +1,76 @@ +/** @file + IPMI KCS Register Definitions + + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Revision Reference: + IPMI Specification + Version 2.0, Rev. 1.1 + https://www.intel.com/content/www/us/en/products/docs/servers/ipmi/ipmi-= second-gen-interface-spec-v2-rev1-1.html +**/ + +#ifndef IPMI_KCS_H_ +#define IPMI_KCS_H_ + +#define IPMI_KCS_STATUS_REGISTER_OFFSET 1 +#define IPMI_KCS_COMMAND_REGISTER_OFFSET 1 +#define IPMI_KCS_DATA_OUT_REGISTER_OFFSET 0 +#define IPMI_KCS_DATA_IN_REGISTER_OFFSET 0 + +/// +/// IPMI KCS Interface Status Bits +/// +#define IPMI_KCS_OBF BIT0 +#define IPMI_KCS_IBF BIT1 +#define IPMI_KCS_SMS_ATN BIT2 +#define IPMI_KCS_COMMAND_DATA BIT3 +#define IPMI_KCS_OEM1 BIT4 +#define IPMI_KCS_OEM2 BIT5 +#define IPMI_KCS_S0 BIT6 +#define IPMI_KCS_S1 BIT7 + +/// +/// IPMI KCS Interface Control Codes +/// +#define IPMI_KCS_CONTROL_CODE_GET_STATUS_ABORT 0x60 +#define IPMI_KCS_CONTROL_CODE_WRITE_START 0x61 +#define IPMI_KCS_CONTROL_CODE_WRITE_END 0x62 +#define IPMI_KCS_CONTROL_CODE_READ 0x68 + +/// +/// Status Codes +/// +#define IPMI_KCS_STATUS_NO_ERROR 0x00 +#define IPMI_KCS_STATUS_ABORT 0x01 +#define IPMI_KCS_STATUS_ILLEGAL 0x02 +#define IPMI_KCS_STATUS_LENGTH_ERROR 0x06 +#define IPMI_KCS_STATUS_UNSPECIFIED 0xFF + +/// +/// KCS Interface State Bit +/// +typedef enum { + IPMI_KCS_IDLE_STATE =3D 0, + IPMI_KCS_READ_STATE, + IPMI_KCS_WRITE_STATE, + IPMI_KCS_ERROR_STATE +} IPMI_KCS_STATE; + +/// +/// IPMI KCS Interface Request Format +/// +typedef struct { + UINT8 NetFunc; + UINT8 Command; + UINT8 Data[]; +} IPMI_KCS_RESQUEST_HEADER; + +/// +/// IPMI KCS Interface Response Format +/// +typedef struct { + UINT8 NetFunc; + UINT8 Command; +} IPMI_KCS_RESPONSE_HEADER; +#endif --=20 2.37.1.windows.1