From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web10.95185.1679637638981244777 for ; Thu, 23 Mar 2023 23:00:39 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ABfDRtQv; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679637639; x=1711173639; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6wqYu61/WkSFbeA5OJrdx+jRGrchN2wHLOAT0reIj9w=; b=ABfDRtQvuj0wQZZsXDzC9MCVifdJ+fa15YIRal45639ILku0Iv6Gj9R5 +Sjo8VHxr0dBLP7dZpZw9e484Z0CZA24iwkS2NqeopQyVRIug4zsmh9z1 RaXlELlvJ3Kc8t9cac5t+io96B/KJa9FLCMUAr/p+IlSQWAavbpNaDqYg Rk8tAUKTwRRgaM0dvkwMpK/xD0r1Ed8w3mnSO0JS6E5X83zRyB2amYeXq 53l4ysa5mfwtE3yk1FX22Brxlkd5UsYaO4Gse3JYwgACm3MRkFxqWu2LZ wmvRblmsV7pW9jzKDHWf7i764Pdqa3zDUadzBlG7jg/teqM0rpYoJrvbe g==; X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="320093864" X-IronPort-AV: E=Sophos;i="5.98,286,1673942400"; d="scan'208";a="320093864" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2023 23:00:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="1012122039" X-IronPort-AV: E=Sophos;i="5.98,286,1673942400"; d="scan'208";a="1012122039" Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2023 23:00:35 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [Patch V5 03/22] UefiCpuPkg/CpuPageTableLib:Initialize some LocalVariable at beginning Date: Fri, 24 Mar 2023 14:00:01 +0800 Message-Id: <20230324060020.940-4-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230324060020.940-1-dun.tan@intel.com> References: <20230324060020.940-1-dun.tan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Move some local variable initialization to the beginning of the function. Also delete duplicated calculation for RegionLength. Signed-off-by: Dun Tan Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann --- UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c index 218068a3e1..127b65183f 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c @@ -258,6 +258,7 @@ PageTableLibMapInLevel ( UINTN BitStart; UINTN Index; IA32_PAGING_ENTRY *PagingEntry; + UINTN PagingEntryIndex; IA32_PAGING_ENTRY *CurrentPagingEntry; UINT64 RegionLength; UINT64 SubLength; @@ -288,6 +289,14 @@ PageTableLibMapInLevel ( LocalParentAttribute.Uint64 = ParentAttribute->Uint64; ParentAttribute = &LocalParentAttribute; + // + // RegionLength: 256T (1 << 48) 512G (1 << 39), 1G (1 << 30), 2M (1 << 21) or 4K (1 << 12). + // + BitStart = 12 + (Level - 1) * 9; + PagingEntryIndex = (UINTN)BitFieldRead64 (LinearAddress + Offset, BitStart, BitStart + 9 - 1); + RegionLength = REGION_LENGTH (Level); + RegionMask = RegionLength - 1; + // // ParentPagingEntry ONLY is deferenced for checking Present and MustBeOne bits // when Modify is FALSE. @@ -353,8 +362,7 @@ PageTableLibMapInLevel ( // PageTableLibSetPnle (&ParentPagingEntry->Pnle, &NopAttribute, &AllOneMask); - RegionLength = REGION_LENGTH (Level); - PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle); + PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle); for (SubOffset = 0, Index = 0; Index < 512; Index++) { PagingEntry[Index].Uint64 = OneOfPagingEntry.Uint64 + SubOffset; SubOffset += RegionLength; @@ -425,15 +433,10 @@ PageTableLibMapInLevel ( } // - // RegionLength: 256T (1 << 48) 512G (1 << 39), 1G (1 << 30), 2M (1 << 21) or 4K (1 << 12). // RegionStart: points to the linear address that's aligned on RegionLength and lower than (LinearAddress + Offset). // - BitStart = 12 + (Level - 1) * 9; - Index = (UINTN)BitFieldRead64 (LinearAddress + Offset, BitStart, BitStart + 9 - 1); - RegionLength = LShiftU64 (1, BitStart); - RegionMask = RegionLength - 1; - RegionStart = (LinearAddress + Offset) & ~RegionMask; - + Index = PagingEntryIndex; + RegionStart = (LinearAddress + Offset) & ~RegionMask; ParentAttribute->Uint64 = PageTableLibGetPnleMapAttribute (&ParentPagingEntry->Pnle, ParentAttribute); // -- 2.31.1.windows.1