From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.94534.1679637641374533517 for ; Thu, 23 Mar 2023 23:00:43 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=NYiY3JN9; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679637643; x=1711173643; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BuFkuO20R/d50XRPBhhF99z5AOYTP9/NBY4JHv8g5jg=; b=NYiY3JN9jByXgPSBS3bzBHftdT98uBKt3KBJAfbMafp4qUCULx4MN6zr 5+VGlh52ZsDKME44knj9lsfXjanHRIPP7PAsbqThN3Pmr2njbuqW3KH7M r+dTfmjNWuRfb1TCgq+wj86TvRqbQ5uY/SIdR96kBDLKqgQCH9AoWWSv0 D24Kjrg3dDbhFG+KRHCgg8t81+aTi6YHTxvvKRHZCNv1e8nQeXQXVQavb wjYymHlixoc/YRbl6++Vyw1WgWlGX5P3KhGwagL5MJBtYC8SSL0T6P58V ScbwcGTmdOMCIWKqH7vTKPmY5QV9p25dpVcFRgaXJBVXpW0ZW7VXsHLvt w==; X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="320093904" X-IronPort-AV: E=Sophos;i="5.98,286,1673942400"; d="scan'208";a="320093904" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2023 23:00:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="1012122059" X-IronPort-AV: E=Sophos;i="5.98,286,1673942400"; d="scan'208";a="1012122059" Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2023 23:00:41 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [Patch V5 06/22] UefiCpuPkg/CpuPageTableLib: Fix issue when splitting leaf entry Date: Fri, 24 Mar 2023 14:00:04 +0800 Message-Id: <20230324060020.940-7-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230324060020.940-1-dun.tan@intel.com> References: <20230324060020.940-1-dun.tan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit When splitting leaf parent entry to smaller granularity, create child page table before modifing parent entry. In previous code logic, when splitting a leaf parent entry, parent entry will point to a null 4k memory before child page table is created in this 4k memory. When the page table to be modified is the page table in CR3, if the executed CpuPageTableLib code is in the range mapped by the modified leaf parent entry, then issue will happen. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann --- UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c index a242710afa..c87eb23248 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c @@ -363,21 +363,24 @@ PageTableLibMapInLevel ( // // Create 512 child-level entries that map to 2M/4K. // - ParentPagingEntry->Uintn = (UINTN)Buffer + *BufferSize; - ZeroMem ((VOID *)ParentPagingEntry->Uintn, SIZE_4KB); + PagingEntry = (IA32_PAGING_ENTRY *)((UINTN)Buffer + *BufferSize); + ZeroMem (PagingEntry, SIZE_4KB); + + for (SubOffset = 0, Index = 0; Index < 512; Index++) { + PagingEntry[Index].Uint64 = OneOfPagingEntry.Uint64 + SubOffset; + SubOffset += RegionLength; + } // // Set NOP attributes // Note: Should NOT inherit the attributes from the original entry because a zero RW bit // will make the entire region read-only even the child entries set the RW bit. // + // Use IA32_PE_BASE_ADDRESS_MASK_40 to only get the generic attribute fields. + // The Pat bit(bit 12) for LEAF_ENTRY_BIG_PAGESIZE is cleared here. + // PageTableLibSetPnle (&ParentPagingEntry->Pnle, &NopAttribute, &AllOneMask); - - PagingEntry = (IA32_PAGING_ENTRY *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry->Pnle); - for (SubOffset = 0, Index = 0; Index < 512; Index++) { - PagingEntry[Index].Uint64 = OneOfPagingEntry.Uint64 + SubOffset; - SubOffset += RegionLength; - } + ParentPagingEntry->Uint64 = ((UINTN)(VOID *)PagingEntry) | (ParentPagingEntry->Uint64 & (~IA32_PE_BASE_ADDRESS_MASK_40)); } } else { // -- 2.31.1.windows.1