From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web10.26627.1679887040165897366 for ; Sun, 26 Mar 2023 20:17:23 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=S2K1PO3R; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: yuanhao.xie@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679887043; x=1711423043; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=C/kKJtYtHJ44W1NUsqNet0x44vaOoF63tpaycrDvS1w=; b=S2K1PO3RSo2mFoJ20TpOUef4HPgkb9t18Vbd8skGgJt7wOT9sUeUuYee Sm8olElFafZptBdKdPtqGpR1PehmpnHl/DJFKEfoqLamu3NW8RDPq+jw5 LuYpku559aeASPrG+6gUMsWHDZraspvmzpOrYXT989q54zKeurG8N5Y8I xvyDNZZSQLt5p9Lo/4SnVILd1JKvm17AEsICzFo8M22QP6PH36I5g440/ RMpcz8dw+DdNoxghIik9S6YzfPpKB08TDru95b+xuV2ZF0MaDXAl9vORD Yx09z3vYfkJdGRJVUiOXtol2T9Um3eZwHPlZvavfb/4rlhRhKOFoO4Hjn g==; X-IronPort-AV: E=McAfee;i="6600,9927,10661"; a="367910202" X-IronPort-AV: E=Sophos;i="5.98,293,1673942400"; d="scan'208";a="367910202" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2023 20:17:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10661"; a="747836744" X-IronPort-AV: E=Sophos;i="5.98,293,1673942400"; d="scan'208";a="747836744" Received: from xieyuanh-mobl.ccr.corp.intel.com ([10.238.0.208]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2023 20:17:21 -0700 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [PATCH 1/2] UefiCpuPkg: Add SendStartupIpiAllExcludingSelf Date: Mon, 27 Mar 2023 11:17:10 +0800 Message-Id: <20230327031711.1575-2-yuanhao.xie@intel.com> X-Mailer: git-send-email 2.39.1.windows.1 In-Reply-To: <20230327031711.1575-1-yuanhao.xie@intel.com> References: <20230327031711.1575-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add new API SendStartupIpiAllExcludingSelf(), and modify SendInitSipiSipiAllExcludingSelf() by let it call the new API. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie --- UefiCpuPkg/Include/Library/LocalApicLib.h | 17 +++++++- .../Library/BaseXApicLib/BaseXApicLib.c | 43 +++++++++++++------ .../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 43 +++++++++++++------ 3 files changed, 76 insertions(+), 27 deletions(-) diff --git a/UefiCpuPkg/Include/Library/LocalApicLib.h b/UefiCpuPkg/Include/Library/LocalApicLib.h index b55d88b0f5..d7c2ad3f70 100644 --- a/UefiCpuPkg/Include/Library/LocalApicLib.h +++ b/UefiCpuPkg/Include/Library/LocalApicLib.h @@ -4,7 +4,7 @@ Local APIC library assumes local APIC is enabled. It does not handles cases where local APIC is disabled. - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -185,6 +185,21 @@ SendInitIpiAllExcludingSelf ( VOID ); +/** + Send a Start-up IPI to all processors excluding self. + This function returns after the IPI has been accepted by the target processors. + if StartupRoutine >= 1M, then ASSERT. + if StartupRoutine is not multiple of 4K, then ASSERT. + @param StartupRoutine Points to a start-up routine which is below 1M physical + address and 4K aligned. +**/ + +VOID +EFIAPI +SendStartupIpiAllExcludingSelf ( + IN UINT32 StartupRoutine + ); + /** Send an INIT-Start-up-Start-up IPI sequence to a specified target processor. diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c index 008b8a070b..d56c6275cc 100644 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c @@ -3,7 +3,7 @@ This local APIC library instance supports xAPIC mode only. - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.
Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -497,6 +497,33 @@ SendInitIpiAllExcludingSelf ( SendIpi (IcrLow.Uint32, 0); } +/** + Send a Start-up IPI to all processors excluding self. + This function returns after the IPI has been accepted by the target processors. + if StartupRoutine >= 1M, then ASSERT. + if StartupRoutine is not multiple of 4K, then ASSERT. + @param StartupRoutine Points to a start-up routine which is below 1M physical + address and 4K aligned. +**/ +VOID +EFIAPI +SendStartupIpiAllExcludingSelf ( + IN UINT32 StartupRoutine + ) +{ + LOCAL_APIC_ICR_LOW IcrLow; + + ASSERT (StartupRoutine < 0x100000); + ASSERT ((StartupRoutine & 0xfff) == 0); + + IcrLow.Uint32 = 0; + IcrLow.Bits.Vector = (StartupRoutine >> 12); + IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; + IcrLow.Bits.Level = 1; + IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; + SendIpi (IcrLow.Uint32, 0); +} + /** Send an INIT-Start-up-Start-up IPI sequence to a specified target processor. @@ -551,22 +578,12 @@ SendInitSipiSipiAllExcludingSelf ( IN UINT32 StartupRoutine ) { - LOCAL_APIC_ICR_LOW IcrLow; - - ASSERT (StartupRoutine < 0x100000); - ASSERT ((StartupRoutine & 0xfff) == 0); - SendInitIpiAllExcludingSelf (); MicroSecondDelay (PcdGet32 (PcdCpuInitIpiDelayInMicroSeconds)); - IcrLow.Uint32 = 0; - IcrLow.Bits.Vector = (StartupRoutine >> 12); - IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; - IcrLow.Bits.Level = 1; - IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); if (!StandardSignatureIsAuthenticAMD ()) { MicroSecondDelay (200); - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); } } diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c index 0ba0499631..aa4eb11181 100644 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c @@ -4,7 +4,7 @@ This local APIC library instance supports x2APIC capable processors which have xAPIC and x2APIC modes. - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.
Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -736,6 +736,33 @@ SendInitIpiAllExcludingSelf ( SendIpi (IcrLow.Uint32, 0); } +/** + Send a Start-up IPI to all processors excluding self. + This function returns after the IPI has been accepted by the target processors. + if StartupRoutine >= 1M, then ASSERT. + if StartupRoutine is not multiple of 4K, then ASSERT. + @param StartupRoutine Points to a start-up routine which is below 1M physical + address and 4K aligned. +**/ +VOID +EFIAPI +SendStartupIpiAllExcludingSelf ( + IN UINT32 StartupRoutine + ) +{ + LOCAL_APIC_ICR_LOW IcrLow; + + ASSERT (StartupRoutine < 0x100000); + ASSERT ((StartupRoutine & 0xfff) == 0); + + IcrLow.Uint32 = 0; + IcrLow.Bits.Vector = (StartupRoutine >> 12); + IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; + IcrLow.Bits.Level = 1; + IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; + SendIpi (IcrLow.Uint32, 0); +} + /** Send an INIT-Start-up-Start-up IPI sequence to a specified target processor. @@ -790,22 +817,12 @@ SendInitSipiSipiAllExcludingSelf ( IN UINT32 StartupRoutine ) { - LOCAL_APIC_ICR_LOW IcrLow; - - ASSERT (StartupRoutine < 0x100000); - ASSERT ((StartupRoutine & 0xfff) == 0); - SendInitIpiAllExcludingSelf (); MicroSecondDelay (PcdGet32 (PcdCpuInitIpiDelayInMicroSeconds)); - IcrLow.Uint32 = 0; - IcrLow.Bits.Vector = (StartupRoutine >> 12); - IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; - IcrLow.Bits.Level = 1; - IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); if (!StandardSignatureIsAuthenticAMD ()) { MicroSecondDelay (200); - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); } } -- 2.36.1.windows.1