From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.1391.1680104646902406984 for ; Wed, 29 Mar 2023 08:44:07 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=LfUaTPYs; spf=pass (domain: intel.com, ip: 134.134.136.24, mailfrom: chasel.chiu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1680104646; x=1711640646; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=qoyQ+YnRoyLA7DqPA04UfgeSF/Hdq1Q/3f3ynNsnYNo=; b=LfUaTPYsw/hmosEQNQntdlrXNkNGC8/ZsdJjswobBT/vY7X2nGcEIC7t zRf+cKldJW9BK8I7vxHU7rSaKfwrG1FkLxqdVKi8HDyx60KnJwcpNmZPB RmMawF461cClix68R+mVOTIaRZ3gjs4JiQIRqrdweHGED5YnRjAss1/9/ Lh8/eNItTzf5/QFxw0q/k0dlTWS2pKzDTuUXxSHBPgp8Sv/udiirvF2YH VYX3h4gOYgXStzbKcVbe1kc/c+MhKkAjjy2ASKvPajo1vTW1+AugwuIZh IxCrtOWBtmKgPfMaM5UKCffHOMVxVZKzStDKJkOFRdpaO89kmy0N8/kAb g==; X-IronPort-AV: E=McAfee;i="6600,9927,10664"; a="342514523" X-IronPort-AV: E=Sophos;i="5.98,301,1673942400"; d="scan'208";a="342514523" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2023 08:44:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10664"; a="677814576" X-IronPort-AV: E=Sophos;i="5.98,301,1673942400"; d="scan'208";a="677814576" Received: from cchiu4-mobl.gar.corp.intel.com ([10.251.1.231]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2023 08:44:06 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Star Zeng , Ray Ni Subject: [PATCH v2] IntelFsp2Pkg: LoadMicrocodeDefault() causing unnecessary delay. Date: Wed, 29 Mar 2023 08:43:52 -0700 Message-Id: <20230329154352.1092-1-chasel.chiu@intel.com> X-Mailer: git-send-email 2.35.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4391 FSP should support the scenario that CPU microcode already loaded before calling LoadMicrocodeDefault(), in this case it should return directly without spending more time. Also the LoadMicrocodeDefault() should only attempt to load one version of the microcode for current CPU and return. Cc: Nate DeSimone Cc: Star Zeng Cc: Ray Ni Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 18 ++++++++++++++---- IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 16 ++++++++++++---- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/= FspSecCore/Ia32/FspApiEntryT.nasm index 2cff8b3643..b902d017ee 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm @@ -245,6 +245,19 @@ ASM_PFX(LoadMicrocodeDefault): cmp esp, 0=0D jz ParamError=0D =0D + ;=0D + ; If microcode already loaded before this function, exit this function = with SUCCESS.=0D + ;=0D + mov eax, 1=0D + cpuid=0D + mov ecx, MSR_IA32_BIOS_SIGN_ID=0D + rdmsr ; Get current microcode signature=0D + xor eax, eax=0D + test edx, edx=0D + jnz Exit2=0D +=0D +=0D +=0D ; skip loading Microcode if the MicrocodeCodeSize is zero=0D ; and report error if size is less than 2k=0D ; first check UPD header revision=0D @@ -450,7 +463,7 @@ LoadCheck: =0D ; Verify this microcode update is not already loaded=0D cmp dword [esi + MicrocodeHdr.MicrocodeHdrRevision], edx=0D - je Continue=0D + je Done ; if already one version microcode loaded, go to done=0D =0D LoadMicrocode:=0D ; EAX contains the linear address of the start of the Update Data=0D @@ -465,9 +478,6 @@ LoadMicrocode: mov eax, 1=0D cpuid=0D =0D -Continue:=0D - jmp NextMicrocode=0D -=0D Done:=0D mov eax, 1=0D cpuid=0D diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm b/IntelFsp2Pkg/F= spSecCore/X64/FspApiEntryT.nasm index b32fa32a89..2a23c33c9b 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm @@ -141,6 +141,17 @@ ASM_PFX(LoadMicrocodeDefault): jz ParamError=0D mov rsp, rcx=0D =0D + ;=0D + ; If microcode already loaded before this function, exit this function = with SUCCESS.=0D + ;=0D + mov eax, 1=0D + cpuid=0D + mov ecx, MSR_IA32_BIOS_SIGN_ID=0D + rdmsr ; Get current microcode signature=0D + xor rax, rax=0D + test edx, edx=0D + jnz Exit2=0D +=0D ; skip loading Microcode if the MicrocodeCodeSize is zero=0D ; and report error if size is less than 2k=0D ; first check UPD header revision=0D @@ -291,7 +302,7 @@ LoadCheck: =0D ; Verify this microcode update is not already loaded=0D cmp dword [esi + MicrocodeHdr.MicrocodeHdrRevision], edx=0D - je Continue=0D + je Done ; if already one version microcode loaded, go to done=0D =0D LoadMicrocode:=0D ; EAX contains the linear address of the start of the Update Data=0D @@ -306,9 +317,6 @@ LoadMicrocode: mov eax, 1=0D cpuid=0D =0D -Continue:=0D - jmp NextMicrocode=0D -=0D Done:=0D mov eax, 1=0D cpuid=0D --=20 2.35.0.windows.1