From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web10.39116.1680211286260888434 for ; Thu, 30 Mar 2023 14:21:26 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ddfuZTio; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C125CB82A41; Thu, 30 Mar 2023 21:21:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BFB68C433A0; Thu, 30 Mar 2023 21:21:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1680211283; bh=4LrZYRIcVFAJ2P1hZlgDghqneeh51+SfH2oqCNqKPF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ddfuZTiotOURYy5mcXq0GjQEwO5Y8IKWvIlN9gqJPPOPN54YfEeKdFW77IvS9aL1Y iWiuaM/BFPVCGRQhva+K1Y32ttgnW0hMOMAHnLXa/NS8L2s92aSiIYZitAY3vKs8NE 2ydd/i3hqTHMyeFq7X83q+6g4ZPko8v+0tCO4qLH8C3Chvtcz8BVebnMr+aefpW3e7 dIURP4HiU0NYwVMYKkzYqxMeokoiXSIkwEnmJooEWGD/+giqMbaTv0z8e/7HJu5qwJ nCkxIA9czYia6Z1AntqXbFt3tAMqeK6bvLXkWpRJNvPujl+ZNL1uYNngsCzxlbj5oV T8bLZd5K4KJHA== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Ni, Ray , Andrew Fish , "Kinney, Michael D" , "Liu, Zhiguang" , Rebecca Cran , Tom Lendacky Subject: [RFT PATCH v2 4/6] UefiCpuPkg/CpuExceptionHandlerLib: Remove needless runtime fixups Date: Thu, 30 Mar 2023 23:20:59 +0200 Message-Id: <20230330212101.1566931-5-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230330212101.1566931-1-ardb@kernel.org> References: <20230330212101.1566931-1-ardb@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Recent versions of the XCODE linker can be instructed to permit text relocations, so we no longer have to work around this, which is especially nice as our workaround assumes that the .text section is mapped both writable and executable at the same time. So remove the runtime fixups and instead, just emit the absolute references into the .text section. While at it, rename the Xcode5ExceptionHandlerAsm.nasm source file and drop the Xcode5 prefix: this code is used by other toolchains too. Signed-off-by: Ard Biesheuvel --- UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf = | 2 +- UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf = | 2 +- UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf = | 2 +- UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/{Xcode5ExceptionHandlerAsm.n= asm =3D> ExceptionHandlerAsm.nasm} | 18 ++---------------- 4 files changed, 5 insertions(+), 19 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandl= erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandle= rLib.inf index d0f82095cf926e99..1b2dde746d154706 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i= nf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i= nf @@ -28,7 +28,7 @@ [Sources.Ia32] Ia32/ArchInterruptDefs.h=0D =0D [Sources.X64]=0D - X64/Xcode5ExceptionHandlerAsm.nasm=0D + X64/ExceptionHandlerAsm.nasm=0D X64/ArchExceptionHandler.c=0D X64/ArchInterruptDefs.h=0D =0D diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandl= erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandle= rLib.inf index 5339f8e604045801..86248cea3e97cedb 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i= nf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i= nf @@ -28,7 +28,7 @@ [Sources.Ia32] Ia32/ArchInterruptDefs.h=0D =0D [Sources.X64]=0D - X64/Xcode5ExceptionHandlerAsm.nasm=0D + X64/ExceptionHandlerAsm.nasm=0D X64/ArchExceptionHandler.c=0D X64/ArchInterruptDefs.h=0D =0D diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandl= erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandle= rLib.inf index 8f8a5dab79303f87..0eed594be8660302 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i= nf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i= nf @@ -28,7 +28,7 @@ [Sources.Ia32] Ia32/ArchInterruptDefs.h=0D =0D [Sources.X64]=0D - X64/Xcode5ExceptionHandlerAsm.nasm=0D + X64/ExceptionHandlerAsm.nasm=0D X64/ArchExceptionHandler.c=0D X64/ArchInterruptDefs.h=0D =0D diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionH= andlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHan= dlerAsm.nasm similarity index 92% rename from UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHa= ndlerAsm.nasm rename to UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm= .nasm index 957478574253e619..10af4cfcdb6b1ea2 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerA= sm.nasm +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm @@ -59,7 +59,7 @@ AsmIdtVectorBegin: %rep 256=0D push strict dword %[Vector] ; This instruction pushes sign-extended= 8-byte value on stack=0D push rax=0D - mov rax, strict qword 0 ; mov rax, ASM_PFX(CommonInterruptE= ntry)=0D + mov rax, ASM_PFX(CommonInterruptEntry)=0D jmp rax=0D %assign Vector Vector+1=0D %endrep=0D @@ -69,8 +69,7 @@ HookAfterStubHeaderBegin: push strict dword 0 ; 0 will be fixed=0D VectorNum:=0D push rax=0D - mov rax, strict qword 0 ; mov rax, HookAfterStubHeaderEnd= =0D -JmpAbsoluteAddress:=0D + mov rax, HookAfterStubHeaderEnd=0D jmp rax=0D HookAfterStubHeaderEnd:=0D mov rax, rsp=0D @@ -456,19 +455,6 @@ ASM_PFX(AsmGetTemplateAddressMap): mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 25= 6=0D lea rax, [HookAfterStubHeaderBegin]=0D mov qword [rcx + 0x10], rax=0D -=0D -; Fix up CommonInterruptEntry address=0D - lea rax, [ASM_PFX(CommonInterruptEntry)]=0D - lea rcx, [AsmIdtVectorBegin]=0D -%rep 256=0D - mov qword [rcx + (JmpAbsoluteAddress - 8 - HookAfterStubHeaderBegin= )], rax=0D - add rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256=0D -%endrep=0D -; Fix up HookAfterStubHeaderEnd=0D - lea rax, [HookAfterStubHeaderEnd]=0D - lea rcx, [JmpAbsoluteAddress]=0D - mov qword [rcx - 8], rax=0D -=0D ret=0D =0D ;-------------------------------------------------------------------------= ------------=0D --=20 2.39.2