From: "Tuan Phan" <tphan@ventanamicro.com>
To: devel@edk2.groups.io
Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn,
zhiguang.liu@intel.com, sunilvl@ventanamicro.com,
git@danielschaefer.me, andrei.warkentin@intel.com,
Tuan Phan <tphan@ventanamicro.com>
Subject: [PATCH v2 1/6] MdePkg/BaseLib: RISC-V: Support getting satp register value
Date: Fri, 14 Apr 2023 11:58:10 -0700 [thread overview]
Message-ID: <20230414185815.2994-2-tphan@ventanamicro.com> (raw)
In-Reply-To: <20230414185815.2994-1-tphan@ventanamicro.com>
Add an API to retrieve satp register value.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
---
MdePkg/Include/Library/BaseLib.h | 5 +++++
MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S | 8 ++++++++
2 files changed, 13 insertions(+)
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 8f2df76c29a3..5d7067ee854e 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -181,6 +181,11 @@ RiscVSetSupervisorAddressTranslationRegister (
IN UINT64
);
+UINT64
+RiscVGetSupervisorAddressTranslationRegister (
+ VOID
+ );
+
UINT64
RiscVReadTimer (
VOID
diff --git a/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S b/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
index ac8f92f38aed..c9cf60c1664b 100644
--- a/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
+++ b/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
@@ -21,3 +21,11 @@
ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister)
csrw CSR_SATP, a0
ret
+
+//
+// Get the value of Supervisor Address Translation and
+// Protection Register.
+//
+ASM_FUNC (RiscVGetSupervisorAddressTranslationRegister)
+ csrr a0, CSR_SATP
+ ret
--
2.25.1
next prev parent reply other threads:[~2023-04-14 18:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-14 18:58 [PATCH v2 0/6] RISC-V MMU support Tuan Phan
2023-04-14 18:58 ` Tuan Phan [this message]
2023-04-18 16:02 ` [PATCH v2 1/6] MdePkg/BaseLib: RISC-V: Support getting satp register value Andrei Warkentin
2023-04-14 18:58 ` [PATCH v2 2/6] MdePkg/Register: RISC-V: Add satp mode bits shift definition Tuan Phan
2023-04-18 16:05 ` Andrei Warkentin
2023-04-14 18:58 ` [PATCH v2 3/6] UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode Tuan Phan
2023-05-24 2:10 ` [edk2-devel] " Chao Li
2023-05-24 9:51 ` Ni, Ray
2023-05-24 18:16 ` Tuan Phan
2023-04-14 18:58 ` [PATCH v2 4/6] OvmfPkg/RiscVVirt: VirtNorFlashPlatformLib: Fix wrong flash size Tuan Phan
2023-04-14 18:58 ` [PATCH v2 5/6] OvmfPkg/VirtNorFlashDxe: Not add memory space if it exists Tuan Phan
2023-04-14 18:58 ` [PATCH v2 6/6] OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devices Tuan Phan
2023-04-18 16:03 ` [PATCH v2 0/6] RISC-V MMU support Andrei Warkentin
2023-04-19 22:37 ` [edk2-devel] " Tuan Phan
2023-05-08 17:19 ` Andrei Warkentin
2023-05-23 21:59 ` Tuan Phan
2023-05-24 4:17 ` Sunil V L
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