From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.73000.1682404696853307043 for ; Mon, 24 Apr 2023 23:38:16 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=L0rsyPmF; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682404696; x=1713940696; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=S2uqNfRMgpC3GfvZDCMqDCcKXeXK+U+zQbJOVqK058M=; b=L0rsyPmF1IS4ptbALLik8F/kqeYCw/0hIp5V/zhqoEPxW9VRijBzqrGu 4+9/P+bYceCJcHk99V/DSJKUHBIfIkdYpMfW/9Gqxg9UrtoM87UZFUUy4 SvrNA47OR4qVoO2yMGa50JyRD4GN9GN30CocuyP7wxNOb/rVE3IxplLIi eCXDXp+G3DhDb+KW9ICW3XY9gy4aOQ4av6XTZi+o6lYNETI7uIpghGq0z KomSRCPOZ0d7grTAAIclGex7fDq6a/AKoBtdn2JaIhniGmoZEAUYY3Akc 7mD7YOtI7BtpnfMuKIOFe3K+fzEMcy6UcBsgy1l7xd+jPHLILUKoKdNHD w==; X-IronPort-AV: E=McAfee;i="6600,9927,10690"; a="326982207" X-IronPort-AV: E=Sophos;i="5.99,224,1677571200"; d="scan'208";a="326982207" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2023 23:37:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10690"; a="693363501" X-IronPort-AV: E=Sophos;i="5.99,224,1677571200"; d="scan'208";a="693363501" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2023 23:37:40 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Nate DeSimone , Ray Ni Subject: [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as False Date: Tue, 25 Apr 2023 14:37:09 +0800 Message-Id: <20230425063709.1951-1-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In BoardX58Ich10 platform, MSR 0x1f2 (ia32_smrr_physbase) and MSR 0x1f3 (ia32_smrr_physmask) are both unimplemented. So set the PcdSmrrEnable as disable to avoid access SMRR Cc: Nate DeSimone Cc: Ray Ni Signed-off-by: Zhiguang Liu --- .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc | 1 + 1 file changed, 1 insertion(+) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc index 472318cc44..732d95e44f 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc @@ -39,6 +39,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|FALSE + gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|FALSE ###################################### # Platform Configuration -- 2.31.1.windows.1