From: "Zhiguang Liu" <zhiguang.liu@intel.com>
To: devel@edk2.groups.io
Cc: Zhiguang Liu <zhiguang.liu@intel.com>,
Nate DeSimone <nathaniel.l.desimone@intel.com>,
Ray Ni <ray.ni@intel.com>
Subject: [PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD PcdSimicsSecPageTablesBase
Date: Tue, 25 Apr 2023 14:40:03 +0800 [thread overview]
Message-ID: <20230425064003.2037-4-zhiguang.liu@intel.com> (raw)
In-Reply-To: <20230425064003.2037-1-zhiguang.liu@intel.com>
Currently, for 64-bit PEI, pagetable is created in reset vector and
stored in SPI flash. No need this PCD now
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 3 ---
Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec | 1 -
Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c | 8 --------
Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf | 1 -
Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 1 -
5 files changed, 14 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index ccb7fe7e59..a74c355e09 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -79,9 +79,6 @@ ErasePolarity = 1
BlockSize = 0x10000
NumBlocks = 0xB0
-0x000000|0x006000
-gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize
-
0x006000|0x001000
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
diff --git a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
index 421c464023..e8aefdd893 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
@@ -38,7 +38,6 @@
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT32|0xf
- gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UINT32|0x11
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UINT32|0x12
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0|UINT32|0x13
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0|UINT32|0x14
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
index 6b572b38a8..39e879e922 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
@@ -759,14 +759,6 @@ SecCoreStartupWithStack (
AsmWriteIdtr (&IdtDescriptor);
-#if defined (MDE_CPU_X64)
- //
- // ASSERT that the Page Tables were set by the reset vector code to
- // the address we expect.
- //
- ASSERT (AsmReadCr3 () == (UINTN) PcdGet32 (PcdSimicsSecPageTablesBase));
-#endif
-
//
// |-------------| <-- TopOfCurrentStack
// | Stack | 32k
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
index 1de3d012a7..af1c0f2b55 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
@@ -62,7 +62,6 @@
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
- gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index cdc30ad582..49f441fe9d 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -65,7 +65,6 @@
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
- gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
--
2.31.1.windows.1
next prev parent reply other threads:[~2023-04-25 6:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-25 6:40 [PATCH 0/3] Enable 64bit PEI for BoardX58Ich10 Zhiguang Liu
2023-04-25 6:40 ` [PATCH 1/3] SimicsOpenBoardPkg: Support 64-bit Pei BoardX58Ich10 Zhiguang Liu
2023-04-25 7:00 ` Ni, Ray
2023-04-25 6:40 ` [PATCH 2/3] SimicsOpenBoardPkg: Initialize temporary memory with PcdInitValueInTempStack Zhiguang Liu
2023-04-25 6:40 ` Zhiguang Liu [this message]
2023-04-25 7:02 ` [PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD PcdSimicsSecPageTablesBase Ni, Ray
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