From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web10.98639.1682474113859855876 for ; Tue, 25 Apr 2023 18:55:16 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=AE+dhPSq; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682474116; x=1714010116; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ol9wJZmOTb3gVbGMv0BV/PzRnCBA5Ngspwsgu1zgtQ4=; b=AE+dhPSqP9hnqtXb5MkK4owT5AQloWSdPZ1UU5pq4W17e9QeB69L9nVc LspQViCIu6GMWSkX8aZnAWmqTv2XsBDStT8eLUXZMqxk1H/m0ydMeg2YN xZtYeUVRHwPN+Kz0Wf7bjQ/GZy/yWAB3h5ZZNPZqt81XT/23hn4t7n95O CXbW3W6sXlP6Q5sdr7Pgaw3oB7IwnmKoDzpSTxhO6qptR3Agj7sBR0IHG 7/40o2aJjk9snpKEOovAw9jS8XT1yXRm/vzAPs3eKNP0UOgPlEuT4L+1B K9ZKQnZCFQn8yk0NYevUlAzJLoo14zZzALhLdvhGHaz7UPS6Z4T0j9uet Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="327280926" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="327280926" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2023 18:55:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="644051923" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="644051923" Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2023 18:54:56 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Xiao X Chen Subject: [Patch V3 1/2] UefiCpuPkg: Update code to support enable ProcTrace only on BSP Date: Wed, 26 Apr 2023 09:54:28 +0800 Message-Id: <20230426015429.3117-2-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230426015429.3117-1-dun.tan@intel.com> References: <20230426015429.3117-1-dun.tan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Update code to support enable ProcTrace only on BSP. Add a new dynamic PCD to indicate if enable ProcTrace only on BSP. In ProcTrace.c code, if this new PCD is true, only allocate buffer and set CtrlReg.Bits.TraceEn to 1 for BSP. Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=4423 Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Xiao X Chen --- UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 3 ++- UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 174 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------------------------------------------------------- UefiCpuPkg/UefiCpuPkg.dec | 7 +++++++ 3 files changed, 119 insertions(+), 65 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf index 7fbcd8da0e..d803012ce2 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -4,7 +4,7 @@ # This library registers CPU features defined in Intel(R) 64 and IA-32 # Architectures Software Developer's Manual. # -# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -62,3 +62,4 @@ gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset ## SOMETIMES_CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## SOMETIMES_CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## SOMETIMES_CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ## SOMETIMES_CONSUMES diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c index 04e6a60728..92d6f54b42 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c @@ -1,7 +1,7 @@ /** @file Intel Processor Trace feature. - Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -46,6 +46,8 @@ typedef struct { UINTN *TopaMemArray; + BOOLEAN EnableOnBspOnly; + PROC_TRACE_PROCESSOR_DATA *ProcessorData; } PROC_TRACE_DATA; @@ -77,6 +79,7 @@ ProcTraceGetConfigData ( ConfigData->NumberOfProcessors = (UINT32)NumberOfProcessors; ConfigData->ProcTraceMemSize = PcdGet32 (PcdCpuProcTraceMemSize); ConfigData->ProcTraceOutputScheme = PcdGet8 (PcdCpuProcTraceOutputScheme); + ConfigData->EnableOnBspOnly = PcdGetBool (PcdCpuProcTraceBspOnly); return ConfigData; } @@ -188,6 +191,7 @@ ProcTraceInitialize ( MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg; MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg; RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr; + BOOLEAN IsBsp; // // The scope of the MSR_IA32_RTIT_* is core for below processor type, only program @@ -236,6 +240,12 @@ ProcTraceInitialize ( return RETURN_SUCCESS; } + IsBsp = (CpuInfo->ProcessorInfo.StatusFlag & PROCESSOR_AS_BSP_BIT) ? TRUE : FALSE; + + if (ProcTraceData->EnableOnBspOnly && !IsBsp) { + return RETURN_SUCCESS; + } + MemRegionBaseAddr = 0; FirstIn = FALSE; @@ -260,43 +270,62 @@ ProcTraceInitialize ( // address base in MSR, IA32_RTIT_OUTPUT_BASE (560h) bits 47:12. Note that all regions must be // aligned based on their size, not just 4K. Thus a 2M region must have bits 20:12 cleared. // - ThreadMemRegionTable = (UINTN *)AllocatePool (ProcTraceData->NumberOfProcessors * sizeof (UINTN *)); - if (ThreadMemRegionTable == NULL) { - DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable Failed\n")); - return RETURN_OUT_OF_RESOURCES; - } - ProcTraceData->ThreadMemRegionTable = ThreadMemRegionTable; - - for (Index = 0; Index < ProcTraceData->NumberOfProcessors; Index++, ProcTraceData->AllocatedThreads++) { - Pages = EFI_SIZE_TO_PAGES (MemRegionSize); - Alignment = MemRegionSize; - AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment); - if (AlignedAddress == 0) { - DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d threads\n", ProcTraceData->AllocatedThreads)); - if (Index == 0) { - // - // Could not allocate for BSP even - // - FreePool ((VOID *)ThreadMemRegionTable); - ThreadMemRegionTable = NULL; - return RETURN_OUT_OF_RESOURCES; + Pages = EFI_SIZE_TO_PAGES (MemRegionSize); + Alignment = MemRegionSize; + if (ProcTraceData->EnableOnBspOnly) { + // + // When only enable ProcTrace on BSP, this is the first and only time ProcTraceInitialize() runs. + // + MemRegionBaseAddr = (UINTN)AllocateAlignedReservedPages (Pages, Alignment); + if (MemRegionBaseAddr == 0) { + // + // Could not allocate for BSP even + // + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate buffer for BSP\n")); + return RETURN_OUT_OF_RESOURCES; + } + + DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT MemRegionBaseAddr(aligned) for BSP only: 0x%llX.\n", (UINT64)MemRegionBaseAddr)); + } else { + ThreadMemRegionTable = (UINTN *)AllocatePool (ProcTraceData->NumberOfProcessors * sizeof (UINTN *)); + if (ThreadMemRegionTable == NULL) { + DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable Failed\n")); + return RETURN_OUT_OF_RESOURCES; + } + + ProcTraceData->ThreadMemRegionTable = ThreadMemRegionTable; + + for (Index = 0; Index < ProcTraceData->NumberOfProcessors; Index++, ProcTraceData->AllocatedThreads++) { + AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment); + if (AlignedAddress == 0) { + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d threads\n", ProcTraceData->AllocatedThreads)); + if (Index == 0) { + // + // Could not allocate for BSP even + // + FreePool ((VOID *)ThreadMemRegionTable); + ThreadMemRegionTable = NULL; + return RETURN_OUT_OF_RESOURCES; + } + + break; } - break; + ThreadMemRegionTable[Index] = AlignedAddress; + DEBUG ((DEBUG_INFO, "ProcTrace: PT MemRegionBaseAddr(aligned) for thread %d: 0x%llX \n", Index, (UINT64)ThreadMemRegionTable[Index])); } - ThreadMemRegionTable[Index] = AlignedAddress; - DEBUG ((DEBUG_INFO, "ProcTrace: PT MemRegionBaseAddr(aligned) for thread %d: 0x%llX \n", Index, (UINT64)ThreadMemRegionTable[Index])); + DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT mem for %d thread \n", ProcTraceData->AllocatedThreads)); } - - DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT mem for %d thread \n", ProcTraceData->AllocatedThreads)); } - if (ProcessorNumber < ProcTraceData->AllocatedThreads) { - MemRegionBaseAddr = ProcTraceData->ThreadMemRegionTable[ProcessorNumber]; - } else { - return RETURN_SUCCESS; + if (!ProcTraceData->EnableOnBspOnly) { + if (ProcessorNumber < ProcTraceData->AllocatedThreads) { + MemRegionBaseAddr = ProcTraceData->ThreadMemRegionTable[ProcessorNumber]; + } else { + return RETURN_SUCCESS; + } } /// @@ -367,50 +396,67 @@ ProcTraceInitialize ( // if (FirstIn) { DEBUG ((DEBUG_INFO, "ProcTrace: Enabling ToPA scheme \n")); - // - // Let BSP allocate ToPA table mem for all threads - // - TopaMemArray = (UINTN *)AllocatePool (ProcTraceData->AllocatedThreads * sizeof (UINTN *)); - if (TopaMemArray == NULL) { - DEBUG ((DEBUG_ERROR, "ProcTrace: Allocate mem for ToPA Failed\n")); - return RETURN_OUT_OF_RESOURCES; - } - ProcTraceData->TopaMemArray = TopaMemArray; + Pages = EFI_SIZE_TO_PAGES (sizeof (PROC_TRACE_TOPA_TABLE)); + Alignment = 0x1000; - for (Index = 0; Index < ProcTraceData->AllocatedThreads; Index++) { - Pages = EFI_SIZE_TO_PAGES (sizeof (PROC_TRACE_TOPA_TABLE)); - Alignment = 0x1000; - AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment); - if (AlignedAddress == 0) { - if (Index < ProcTraceData->AllocatedThreads) { - ProcTraceData->AllocatedThreads = Index; - } + if (ProcTraceData->EnableOnBspOnly) { + // + // When only enable ProcTrace on BSP, this is the first and only time ProcTraceInitialize() runs. + // + TopaTableBaseAddr = (UINTN)AllocateAlignedReservedPages (Pages, Alignment); + if (TopaTableBaseAddr == 0) { + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate ToPA mem for BSP")); + return RETURN_OUT_OF_RESOURCES; + } - DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated ToPA mem only for %d threads\n", ProcTraceData->AllocatedThreads)); - if (Index == 0) { - // - // Could not allocate for BSP even - // - FreePool ((VOID *)TopaMemArray); - TopaMemArray = NULL; - return RETURN_OUT_OF_RESOURCES; + DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for BSP only: 0x%llX \n", (UINT64)TopaTableBaseAddr)); + } else { + // + // Let BSP allocate ToPA table mem for all threads + // + TopaMemArray = (UINTN *)AllocatePool (ProcTraceData->AllocatedThreads * sizeof (UINTN *)); + if (TopaMemArray == NULL) { + DEBUG ((DEBUG_ERROR, "ProcTrace: Allocate mem for ToPA Failed\n")); + return RETURN_OUT_OF_RESOURCES; + } + + ProcTraceData->TopaMemArray = TopaMemArray; + + for (Index = 0; Index < ProcTraceData->AllocatedThreads; Index++) { + AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment); + if (AlignedAddress == 0) { + if (Index < ProcTraceData->AllocatedThreads) { + ProcTraceData->AllocatedThreads = Index; + } + + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated ToPA mem only for %d threads\n", ProcTraceData->AllocatedThreads)); + if (Index == 0) { + // + // Could not allocate for BSP even + // + FreePool ((VOID *)TopaMemArray); + TopaMemArray = NULL; + return RETURN_OUT_OF_RESOURCES; + } + + break; } - break; + TopaMemArray[Index] = AlignedAddress; + DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for thread %d is 0x%llX \n", Index, (UINT64)TopaMemArray[Index])); } - TopaMemArray[Index] = AlignedAddress; - DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for thread %d is 0x%llX \n", Index, (UINT64)TopaMemArray[Index])); + DEBUG ((DEBUG_INFO, "ProcTrace: Allocated ToPA mem for %d thread \n", ProcTraceData->AllocatedThreads)); } - - DEBUG ((DEBUG_INFO, "ProcTrace: Allocated ToPA mem for %d thread \n", ProcTraceData->AllocatedThreads)); } - if (ProcessorNumber < ProcTraceData->AllocatedThreads) { - TopaTableBaseAddr = ProcTraceData->TopaMemArray[ProcessorNumber]; - } else { - return RETURN_SUCCESS; + if (!ProcTraceData->EnableOnBspOnly) { + if (ProcessorNumber < ProcTraceData->AllocatedThreads) { + TopaTableBaseAddr = ProcTraceData->TopaMemArray[ProcessorNumber]; + } else { + return RETURN_SUCCESS; + } } TopaTable = (PROC_TRACE_TOPA_TABLE *)TopaTableBaseAddr; diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index a5528277ff..14dadfbf53 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -422,5 +422,12 @@ # @Prompt GHCB Hypervisor Features gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures|0x0|UINT64|0x60000018 + ## This PCD indicates whether CPU processor trace is enabled on BSP only when CPU processor trace is enabled.

+ # This PCD is ignored if CPU processor trace is disabled.

+ # TRUE - CPU processor trace is enabled on BSP only.
+ # FASLE - CPU processor trace is enabled on all CPU.
+ # @Prompt Enable CPU processor trace only on BSP. + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly|FALSE|BOOLEAN|0x60000019 + [UserExtensions.TianoCore."ExtraFiles"] UefiCpuPkgExtra.uni -- 2.39.1.windows.1