From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.1740.1682489774480026272 for ; Tue, 25 Apr 2023 23:16:15 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=h6mtoxda; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682489775; x=1714025775; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Sm6p+Z/GhbV8ft24SY7LDc5QMzt7gpMqdPj4ZIDyG+8=; b=h6mtoxda2iFm96DXbc8t+LkGQNQmfh0VpulC/vwpcdkw70//LYLPJ2zK yP1swI1jxLfFlrkgEkM3U+TWcMljxL3asX4qYOwBNEmlZYJofFN9cycuS hMUnIzB7TH17mDPWFhaFSJG5zIuntTCD3V4j7wyuRYq0AK8CgC13iyeza 2s6UmDn8ZdgmVMmvsMfxcejU59TTZLxUDiSqwudwQWhyQ87b4vP6OlgtG CsNT6xTV5us4Iie8Rqf50gQgDjdNKVY1BbXV7RC5U4lK21NLCgltU8Stc hu7ymLXkX1e+OqFtyWRTHKlCQbO/sNzbCMcyqiuv0jG93/ckkjx9kCOWC w==; X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="331235158" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="331235158" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2023 23:16:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="644125191" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="644125191" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2023 23:16:13 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Nate DeSimone , Ray Ni Subject: [PATCH v2 2/5] SimicsOpenBoardPkg: Move AcpiVariableGuid hob to MemDetect Date: Wed, 26 Apr 2023 14:15:46 +0800 Message-Id: <20230426061549.1254-3-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230426061549.1254-1-zhiguang.liu@intel.com> References: <20230426061549.1254-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently, MemDetect create gEfiSmmSmramMemoryGuid Hob containing one descriptor, which should be updated later, when AcpiVariableGuid hob use some buffer from SmRam. However, the Hob doesn't get updated, and this is a bug. Move the logic creating AcpiVariableGuid hob from PEIM SmmAccessPei.inf to MemDetect, so that in the same file, it has both knowleage about the smmram and the acpi data structure. So it can create the gEfiSmmSmramMemoryGuid Hob containing two descriptors. Cc: Nate DeSimone Cc: Ray Ni Reviewed-by: Ray Ni Signed-off-by: Zhiguang Liu --- .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 36 +++++++++++-------- .../SimicsPei/SimicsPei.inf | 3 +- .../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 10 +----- .../Smm/Access/SmmAccessPei.inf | 5 +-- 4 files changed, 25 insertions(+), 29 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c index b79e8eb73a..5da8ef80b2 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c @@ -391,11 +391,10 @@ QemuInitializeRam ( UINT64 LowerMemorySize; UINT64 UpperMemorySize; UINTN BufferSize; - UINT8 SmramIndex; UINT8 SmramRanges; EFI_PEI_HOB_POINTERS Hob; EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock; - UINT8 Index; + VOID *GuidHob; DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__)); @@ -428,8 +427,8 @@ QemuInitializeRam ( AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize, TRUE); - BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK); - SmramRanges = 1; + SmramRanges = 2; + BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (SmramRanges - 1) * sizeof(EFI_SMRAM_DESCRIPTOR); Hob.Raw = BuildGuidHob( &gEfiSmmSmramMemoryGuid, @@ -440,18 +439,25 @@ QemuInitializeRam ( SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw); SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges; - SmramIndex = 0; - for (Index = 0; Index < SmramRanges; Index++) { - // - // This is an SMRAM range, create an SMRAM descriptor - // - SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart = LowerMemorySize - TsegSize; - SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart = LowerMemorySize - TsegSize; - SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize = TsegSize; - SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState = EFI_SMRAM_CLOSED | EFI_CACHEABLE; - SmramIndex++; - } + // + // Create first SMRAM descriptor, which contains data structures used in S3 resume. + // One page is enough for the data structure + // + SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = LowerMemorySize - TsegSize; + SmramHobDescriptorBlock->Descriptor[0].CpuStart = LowerMemorySize - TsegSize; + SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = EFI_PAGE_SIZE; + SmramHobDescriptorBlock->Descriptor[0].RegionState = EFI_SMRAM_CLOSED | EFI_CACHEABLE | EFI_ALLOCATED; + GuidHob = BuildGuidHob (&gEfiAcpiVariableGuid, sizeof(EFI_SMRAM_DESCRIPTOR)); + ASSERT (GuidHob != NULL); + CopyMem (GuidHob, &SmramHobDescriptorBlock->Descriptor[0], sizeof(EFI_SMRAM_DESCRIPTOR)); + // + // Create second SMRAM descriptor, which is free and will be used by SMM foundation. + // + SmramHobDescriptorBlock->Descriptor[1].PhysicalStart = SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE; + SmramHobDescriptorBlock->Descriptor[1].CpuStart = SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE; + SmramHobDescriptorBlock->Descriptor[1].PhysicalSize = TsegSize - EFI_PAGE_SIZE; + SmramHobDescriptorBlock->Descriptor[1].RegionState = EFI_SMRAM_CLOSED | EFI_CACHEABLE; } else { AddMemoryRangeHob (BASE_1MB, LowerMemorySize); } diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf index 710fa680be..9a85ccb962 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf @@ -2,7 +2,7 @@ # Platform PEI driver # # This module provides platform specific function to detect boot mode. -# Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023 Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -40,6 +40,7 @@ [Guids] gEfiMemoryTypeInformationGuid gEfiSmmSmramMemoryGuid ## CONSUMES + gEfiAcpiVariableGuid [LibraryClasses] BaseLib diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c index c54026b4d1..ff9f9d8577 100644 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c +++ b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c @@ -10,7 +10,7 @@ duration. Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -241,7 +241,6 @@ SmmAccessPeiEntryPoint ( EFI_STATUS Status; UINTN SmramMapSize; EFI_SMRAM_DESCRIPTOR SmramMap[DescIdxCount]; - VOID *GuidHob; // // This module should only be included if SMRAM support is required. @@ -322,13 +321,6 @@ SmmAccessPeiEntryPoint ( } DEBUG_CODE_END (); - GuidHob = BuildGuidHob (&gEfiAcpiVariableGuid, sizeof SmramMap[DescIdxSmmS3ResumeState]); - if (GuidHob == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - CopyMem (GuidHob, &SmramMap[DescIdxSmmS3ResumeState], sizeof SmramMap[DescIdxSmmS3ResumeState]); - // // We're done. The next step should succeed, but even if it fails, we can't // roll back the above BuildGuidHob() allocation, because PEI doesn't support diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf index 2b6b14f437..6aa5b76e63 100644 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf +++ b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf @@ -7,7 +7,7 @@ # it via the gEfiAcpiVariableGuid GUIDed HOB. # # Copyright (C) 2013, 2015, Red Hat, Inc. -# Copyright (C) 2019, Intel Corporation. All rights reserved.
+# Copyright (C) 2019 - 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,9 +38,6 @@ SimicsX58SktPkg/SktPkg.dec SimicsIch10Pkg/Ich10Pkg.dec -[Guids] - gEfiAcpiVariableGuid - [LibraryClasses] BaseLib BaseMemoryLib -- 2.31.1.windows.1