From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.11867.1682655048866354898 for ; Thu, 27 Apr 2023 21:10:49 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: qiandongyan@loongson.cn) Received: from loongson.cn (unknown [10.2.9.245]) by gateway (Coremail) with SMTP id _____8BxLutER0tkU_gBAA--.3418S3; Fri, 28 Apr 2023 12:10:44 +0800 (CST) Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxfbNDR0tkAMk_AA--.20670S2; Fri, 28 Apr 2023 12:10:43 +0800 (CST) From: "Dongyan Qian" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Chao Li Subject: [PATCH] BaseSynchronizationLib: Fix LoongArch64 synchronization functions Date: Fri, 28 Apr 2023 12:10:40 +0800 Message-Id: <20230428041040.2021514-1-qiandongyan@loongson.cn> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8DxfbNDR0tkAMk_AA--.20670S2 X-CM-SenderInfo: htld0v5rqj5t3q6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBjvJXoWxAF15GrW3tF1DurykCFW7Arb_yoW5WrW7pr 13trySkF15Kw4xGF1xKws8JF15Xw1kCF98Ga98Zw18Aw1qyFyv934aqr48Zry8uFW7u3WI vF17Kr4kK3WDCrDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU bn8Fc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7 CjxVAFwI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2 zVCFFI0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VCjz48v1sIEY20_WwAm72CE4IkC6x 0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64vIr41l42xK82IY6x8ErcxF aVAv8VWrMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxV Cjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY 6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6x AIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY 1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvj4RC_MaUUUUU Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4432 There is a return value bug: The sc.w/sc.d instruction will destroy the reg_t0, use reg_t1 to avoid context reg_t0 being corrupted. Adjust Check that ptr align is UINT16. Optimize function SyncIncrement and SyncDecrement. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Chao Li Signed-off-by: Dongyan Qian --- .../LoongArch64/AsmSynchronization.S | 30 ++++++++----------- .../LoongArch64/Synchronization.c | 2 +- 2 files changed, 13 insertions(+), 19 deletions(-) diff --git a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S index fdd50c54b5..03865bf2c9 100644 --- a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S +++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S @@ -53,9 +53,9 @@ ASM_PFX(AsmInternalSyncCompareExchange32): 1: ll.w $t0, $a0, 0x0 bne $t0, $a1, 2f - move $t0, $a2 - sc.w $t0, $a0, 0x0 - beqz $t0, 1b + move $t1, $a2 + sc.w $t1, $a0, 0x0 + beqz $t1, 1b b 3f 2: dbar 0 @@ -76,9 +76,9 @@ ASM_PFX(AsmInternalSyncCompareExchange64): 1: ll.d $t0, $a0, 0x0 bne $t0, $a1, 2f - move $t0, $a2 - sc.d $t0, $a0, 0x0 - beqz $t0, 1b + move $t1, $a2 + sc.d $t1, $a0, 0x0 + beqz $t1, 1b b 3f 2: dbar 0 @@ -94,13 +94,10 @@ AsmInternalSyncIncrement ( ) **/ ASM_PFX(AsmInternalSyncIncrement): - move $t0, $a0 - dbar 0 - ld.w $t1, $t0, 0x0 - li.w $t2, 1 - amadd.w $t1, $t2, $t0 + li.w $t0, 1 + amadd.w $zero, $t0, $a0 - ld.w $a0, $t0, 0x0 + ld.w $a0, $a0, 0 jirl $zero, $ra, 0 /** @@ -111,12 +108,9 @@ AsmInternalSyncDecrement ( ) **/ ASM_PFX(AsmInternalSyncDecrement): - move $t0, $a0 - dbar 0 - ld.w $t1, $t0, 0x0 - li.w $t2, -1 - amadd.w $t1, $t2, $t0 + li.w $t0, -1 + amadd.w $zero, $t0, $a0 - ld.w $a0, $t0, 0x0 + ld.w $a0, $a0, 0 jirl $zero, $ra, 0 .end diff --git a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c index d696c8ce10..6baf841c9b 100644 --- a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c +++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c @@ -81,7 +81,7 @@ InternalSyncCompareExchange16 ( volatile UINT32 *Ptr32; /* Check that ptr is naturally aligned */ - ASSERT (!((UINT64)Value & (sizeof (Value) - 1))); + ASSERT (!((UINT64)Value & (sizeof (UINT16) - 1))); /* Mask inputs to the correct size. */ Mask = (((~0UL) - (1UL << (0)) + 1) & (~0UL >> (64 - 1 - ((sizeof (UINT16) * 8) - 1)))); -- 2.27.0