From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web11.13385.1682664204127165713 for ; Thu, 27 Apr 2023 23:43:24 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=MM1LezH5; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682664204; x=1714200204; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gHw/b3Rg0CgPirsRLCGc51lERPkPQ1i1frLB97M0zlQ=; b=MM1LezH5VVA9jsNO30yphdH5UOfMkIews0B5NYnUS0tjXmpucYoHzC80 DG28ThYPKs2k0bYFFYtnbauIJJbpy4AjgDKOAiAzQHuTl0EcBnzy/D9ii gLqphZoBZj/TKY8mPkmmbSAkjQZE8EVPawgs11Pi4T5aq9GSimdSxmdiZ 0wycOWqyvf3B/Hh20NncNDyllIkGDQ9vpJDCI4YBcjHvaf/V2oPp3wLS4 kzVk5WljxAveScc2IBdSN/fHcGjWE+G4hPeMdA0KuxpcO8XwJKFCHj6o2 NwTUSOHpLS0GGSfh7mGvxz5CGg9jXyt63cDkO9QNhz/7wmnlp70rabvdu Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10693"; a="433956829" X-IronPort-AV: E=Sophos;i="5.99,233,1677571200"; d="scan'208";a="433956829" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2023 23:43:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10693"; a="806262939" X-IronPort-AV: E=Sophos;i="5.99,233,1677571200"; d="scan'208";a="806262939" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2023 23:43:09 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West Subject: [PATCH v3 4/5] UefiCpuPkg/ResetVector: Modify Page Table in ResetVector Date: Fri, 28 Apr 2023 14:42:22 +0800 Message-Id: <20230428064223.2048-4-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230428064223.2048-1-zhiguang.liu@intel.com> References: <20230428064223.2048-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In ResetVector, if create page table, its highest address is fixed because after page table, code layout is fixed(4K for normal code, and another 4K only contains reset vector code). Today's implementation organizes the page table as following if 1G page table is used: 4G-16K: PML4 page (PML4[0] points to 4G-12K) 4G-12K: PDP page CR3 is set to 4G-16K When 2M page table is used, the layout is as following: 4G-32K: PML4 page (PML4[0] points to 4G-28K) 4G-28K: PDP page (PDP entries point to PD pages) 4G-24K: PD page mapping 0-1G 4G-20K: PD page mapping 1-2G 4G-16K: PD page mapping 2-3G 4G-12K: PD page mapping 3-4G CR3 is set to 4G-32K CR3 doesn't point to a fixed location which is a bit hard to debug at runtime. The new page table layout will always put PML4 in highest address When 1G page table is used, the layout is as following: 4G-16K: PDP page 4G-12K: PML4 page (PML4[0] points to 4G-16K) When 2M page table is used, the layout is as following: 4G-32K: PD page mapping 0-1G 4G-28K: PD page mapping 1-2G 4G-24K: PD page mapping 2-3G 4G-20K: PD page mapping 3-4G 4G-16K: PDP page (PDP entries point to PD pages) 4G-12K: PML4 page (PML4[0] points to 4G-16K) CR3 is always set to 4G-12K So, this patch can improve biodegradability by make sure the init CR3 pointing to a fixed address(4G-12K). Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- .../ResetVector/Vtf0/X64/PageTables.asm | 32 +++++++++---------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm index 469fed0006..4ff68cddef 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -41,13 +41,6 @@ BITS 64 ALIGN 16 -Pml4: - ; - ; PML4 (1 * 512GB entry) - ; - DQ PG_NLE(Pdp) - TIMES 0x1000 - ($ - Pml4) DB 0 - %ifdef PAGE_TABLE_1G Pdp: ; @@ -59,6 +52,16 @@ Pdp: %assign i i+1 %endrep %else +Pd: + ; + ; Page-Directory (2048 * 2MB entries => 4GB) + ; Four pages below, each is pointed by one entry in Pdp. + ; + %assign i 0 + %rep 0x800 + DQ PTE_2MB(i) + %assign i i+1 + %endrep Pdp: ; ; Page-directory pointer table (4 * 1GB entries => 4GB) @@ -69,15 +72,12 @@ Pdp: DQ PG_NLE(Pd + 0x3000) TIMES 0x1000 - ($ - Pdp) DB 0 -Pd: +%endif + +Pml4: ; - ; Page-Directory (2048 * 2MB entries => 4GB) - ; Four pages below, each is pointed by one entry in Pdp. + ; PML4 (1 * 512GB entry) ; - %assign i 0 - %rep 0x800 - DQ PTE_2MB(i) - %assign i i+1 - %endrep -%endif + DQ PG_NLE(Pdp) + TIMES 0x1000 - ($ - Pml4) DB 0 EndOfPageTables: -- 2.31.1.windows.1