From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web11.13385.1682664204127165713 for ; Thu, 27 Apr 2023 23:43:24 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=CAI5XtG1; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682664204; x=1714200204; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=48rNX3shu2YGvYg4oXw2Z8i6s7tSEQzN1YPgfxDK8uU=; b=CAI5XtG17at6uEnZvAa+983Xq2RO09AcFhjO0ehF8Bep9AVIdmVCevYq Jmxb3TSQTgyg4wdcF0CRHxusoCPuzQf66+2SGXcyuM5mssXTpmkFaENFe J6WHKm692e9v4lmBw0Lm3jjuw9YTpv9qPeSPExGvPxpobZ/e6/KenE9vN piP9VCC7IEJS5xNiUKtFaLYggi946auenz8Pl75mWmj36qBY198IWMcdc OP7RyW96sw89xAo76vv/NzoFMZj45nulXBTKelT/+6UJ/t4X5oh9pvScb YO2i1HDr+8naIGKczBb6cae0PdSraRd5R7q8x3xpBhIdgBrnZbDMMHku5 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10693"; a="433956836" X-IronPort-AV: E=Sophos;i="5.99,233,1677571200"; d="scan'208";a="433956836" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2023 23:43:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10693"; a="806262947" X-IronPort-AV: E=Sophos;i="5.99,233,1677571200"; d="scan'208";a="806262947" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2023 23:43:11 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West Subject: [PATCH v3 5/5] UefiCpuPkg/ResetVector: Support 5 level page table in ResetVector Date: Fri, 28 Apr 2023 14:42:23 +0800 Message-Id: <20230428064223.2048-5-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230428064223.2048-1-zhiguang.liu@intel.com> References: <20230428064223.2048-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a macro USE_5_LEVEL_PAGE_TABLE to determine whether to create 5 level page table. If macro USE_5_LEVEL_PAGE_TABLE is defined, PML5Table is created at (4G-12K), while PML4Table is at (4G-16K). In runtime check, if 5level paging is supported, use PML5Table, otherwise, use PML4Table. If macro USE_5_LEVEL_PAGE_TABLE is not defined, to save space, 5level paging is not created, and 4level paging is at (4G-12K) and be used. Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- .../ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm | 25 +++++++++++++++++-- .../ResetVector/Vtf0/Ia32/PageTables64.asm | 24 ------------------ UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 1 - .../ResetVector/Vtf0/X64/PageTables.asm | 9 +++++++ 4 files changed, 32 insertions(+), 27 deletions(-) delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm index 6891397c2a..f119f941a5 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm @@ -2,7 +2,7 @@ ; @file ; Transition from 32 bit flat protected mode into 64 bit flat protected mode ; -; Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ;------------------------------------------------------------------------------ @@ -14,7 +14,28 @@ BITS 32 ; Transition32FlatTo64Flat: - OneTimeCall SetCr3ForPageTables64 +%ifdef USE_5_LEVEL_PAGE_TABLE + mov eax, 0 + cpuid + cmp eax, 07h ; check if basic CPUID leaf contains leaf 07 + jb NotSupport5LevelPaging ; 5level paging not support, downgrade to 4level paging + mov eax, 07h ; check cpuid leaf 7, subleaf 0 + mov ecx, 0 + cpuid + bt ecx, 16 ; [Bits 16] Supports 5-level paging if 1. + jnc NotSupport5LevelPaging ; 5level paging not support, downgrade to 4level paging + mov eax, ADDR_OF(Pml5) + mov cr3, eax + mov eax, cr4 + bts eax, 12 ; Set LA57=1. + mov cr4, eax + jmp SetCr3Done +NotSupport5LevelPaging: +%endif + + mov eax, ADDR_OF(Pml4) + mov cr3, eax +SetCr3Done: mov eax, cr4 bts eax, 5 ; enable PAE diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm deleted file mode 100644 index f188da20ba..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm +++ /dev/null @@ -1,24 +0,0 @@ -;------------------------------------------------------------------------------ -; @file -; Sets the CR3 register for 64-bit paging -; -; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
-; SPDX-License-Identifier: BSD-2-Clause-Patent -; -;------------------------------------------------------------------------------ - -BITS 32 - -; -; Modified: EAX -; -SetCr3ForPageTables64: - - ; - ; These pages are built into the ROM image in X64/PageTables.asm - ; - mov eax, ADDR_OF(Pml4) - mov cr3, eax - - OneTimeCallRet SetCr3ForPageTables64 - diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb index 136361e62c..5a6563bd34 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb @@ -54,7 +54,6 @@ %ifdef ARCH_X64 %include "Ia32/Flat32ToFlat64.asm" -%include "Ia32/PageTables64.asm" %endif %include "Ia16/Real16ToFlat32.asm" diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm index 4ff68cddef..5aa229eb14 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -80,4 +80,13 @@ Pml4: ; DQ PG_NLE(Pdp) TIMES 0x1000 - ($ - Pml4) DB 0 + +%ifdef USE_5_LEVEL_PAGE_TABLE +Pml5: + ; + ; Pml5 table (only first entry is present, pointing to Pml4) + ; + DQ PG_NLE(Pml4) + TIMES 0x1000 - ($ - Pml5) DB 0 +%endif EndOfPageTables: -- 2.31.1.windows.1