From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.40155.1683165349361621800 for ; Wed, 03 May 2023 18:55:51 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=dcB9ub2g; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683165351; x=1714701351; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4ASQLGHC0edJ/u7JbwYxFLlL67Bp6lAYq8dBsMSlgaw=; b=dcB9ub2grL5csMpJqXwDn5LxjEuQaNxg3uioN6Qu6NjXNA2Ana4v6+8C AGdInh7yDI2qgYovhWik1flZB0TK8Ktn0NowSQUhjoJenDGyRaWLyuxW6 x+eQX7qTpPukJRcSWASVumOMHHBuEqlYgn8H7EbkYH2g5nwE766YFL/pe fvvF1TNXOV9Xx60/Zqp8H76vEYxOZ8mI1vjTqWxUZcCk2BVbuClpSbH0d 6Q+Y40Wu33+7gLc307gW3xm1k8xK0HRj+EArUDaNOqaDpHCKLsbw/T0RH ZIYMk2I89hCG1p0EYjFJMJkaHSYebEbo+urXxiF6Gqd61UFJ9+iOJ+Oak g==; X-IronPort-AV: E=McAfee;i="6600,9927,10699"; a="337955411" X-IronPort-AV: E=Sophos;i="5.99,248,1677571200"; d="scan'208";a="337955411" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2023 18:55:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10699"; a="674341427" X-IronPort-AV: E=Sophos;i="5.99,248,1677571200"; d="scan'208";a="674341427" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2023 18:55:46 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West Subject: [PATCH v4 4/5] UefiCpuPkg/ResetVector: Modify Page Table in ResetVector Date: Thu, 4 May 2023 09:55:16 +0800 Message-Id: <20230504015517.2487-5-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230504015517.2487-1-zhiguang.liu@intel.com> References: <20230504015517.2487-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In ResetVector, if create page table, its highest address is fixed because after page table, code layout is fixed(4K for normal code, and another 4K only contains reset vector code). Today's implementation organizes the page table as following if 1G page table is used: 4G-16K: PML4 page (PML4[0] points to 4G-12K) 4G-12K: PDP page CR3 is set to 4G-16K When 2M page table is used, the layout is as following: 4G-32K: PML4 page (PML4[0] points to 4G-28K) 4G-28K: PDP page (PDP entries point to PD pages) 4G-24K: PD page mapping 0-1G 4G-20K: PD page mapping 1-2G 4G-16K: PD page mapping 2-3G 4G-12K: PD page mapping 3-4G CR3 is set to 4G-32K CR3 doesn't point to a fixed location which is a bit hard to debug at runtime. The new page table layout will always put PML4 in highest address When 1G page table is used, the layout is as following: 4G-16K: PDP page 4G-12K: PML4 page (PML4[0] points to 4G-16K) When 2M page table is used, the layout is as following: 4G-32K: PD page mapping 0-1G 4G-28K: PD page mapping 1-2G 4G-24K: PD page mapping 2-3G 4G-20K: PD page mapping 3-4G 4G-16K: PDP page (PDP entries point to PD pages) 4G-12K: PML4 page (PML4[0] points to 4G-16K) CR3 is always set to 4G-12K So, this patch can improve biodegradability by make sure the init CR3 pointing to a fixed address(4G-12K). Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- .../ResetVector/Vtf0/X64/PageTables.asm | 33 ++++++++++--------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm index fb953ebaa3..60f11a1f7d 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -41,13 +41,6 @@ BITS 64 ALIGN 16 -Pml4: - ; - ; PML4 (1 * 512GB entry) - ; - DQ PAGE_NLE(Pdp) - TIMES 0x1000 - ($ - Pml4) DB 0 - %ifdef PAGE_TABLE_1G Pdp: ; @@ -59,15 +52,6 @@ Pdp: %assign i i+1 %endrep %else -Pdp: - ; - ; Page-directory pointer table (4 * 1GB entries => 4GB) - ; - DQ PAGE_NLE(Pd) - DQ PAGE_NLE(Pd + 0x1000) - DQ PAGE_NLE(Pd + 0x2000) - DQ PAGE_NLE(Pd + 0x3000) - TIMES 0x1000 - ($ - Pdp) DB 0 Pd: ; @@ -79,5 +63,22 @@ Pd: DQ PDE_2MB(i) %assign i i+1 %endrep +Pdp: + ; + ; Page-directory pointer table (4 * 1GB entries => 4GB) + ; + DQ PAGE_NLE(Pd) + DQ PAGE_NLE(Pd + 0x1000) + DQ PAGE_NLE(Pd + 0x2000) + DQ PAGE_NLE(Pd + 0x3000) + TIMES 0x1000 - ($ - Pdp) DB 0 + %endif + +Pml4: + ; + ; PML4 (1 * 512GB entry) + ; + DQ PAGE_NLE(Pdp) + TIMES 0x1000 - ($ - Pml4) DB 0 EndOfPageTables: -- 2.31.1.windows.1