From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.51610.1683210292105724025 for ; Thu, 04 May 2023 07:24:52 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=softfail (domain: linaro.org, ip: 213.251.184.221, mailfrom: marcin.juszkiewicz@linaro.org) Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id BB580260080; Thu, 4 May 2023 16:24:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rKY9jsthzUal; Thu, 4 May 2023 16:24:48 +0200 (CEST) Received: from applejack.lan (83.11.34.59.ipv4.supernova.orange.pl [83.11.34.59]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id B211E260824; Thu, 4 May 2023 16:24:47 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Rebecca Cran , Sami Mujawar , Marcin Juszkiewicz Subject: [PATCH 1/7] ArmPkg: fix reading of first nibbles in ArmCpuInfo Date: Thu, 4 May 2023 15:24:34 +0100 Message-Id: <20230504142440.827531-2-marcin.juszkiewicz@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504142440.827531-1-marcin.juszkiewicz@linaro.org> References: <20230504142440.827531-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable First nibbles of DFR0/ISAR1/ISAR2/MMRF2/PFR0 system registers were read in wrong way -- second one was used instead. Signed-off-by: Marcin Juszkiewicz --- ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c b/ArmPkg/Applicat= ion/ArmCpuInfo/ArmCpuInfo.c index deea90fbdfbf..3f0a49649790 100644 --- a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c +++ b/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c @@ -107,7 +107,7 @@ HandleAa64Dfr0 ( CONST CHAR8 *Bits; =20 Bits =3D "3:0 "; - Value =3D (Aa64Dfr0 >> 4) & 0xf; + Value =3D Aa64Dfr0 & 0xf; switch (Value) { case b0110: Description =3D "Armv8 debug architecture"; @@ -637,7 +637,7 @@ HandleAa64Isar1 ( CONST CHAR8 *Bits; =20 Bits =3D "3:0 "; - Value =3D (Aa64Isar1 >> 4) & 0xf; + Value =3D Aa64Isar1 & 0xf; switch (Value) { case b0000: Description =3D "DC CVAP not implemented."; @@ -954,7 +954,7 @@ HandleAa64Isar2 ( CONST CHAR8 *Bits; =20 Bits =3D "3:0 "; - Value =3D (Aa64Isar2 >> 4) & 0xf; + Value =3D Aa64Isar2 & 0xf; switch (Value) { case b0000: Description =3D "FEAT_WFxT not implemented."; @@ -1637,7 +1637,7 @@ HandleAa64Mmfr2 ( CONST CHAR8 *Bits; =20 Bits =3D "3:0 "; - Value =3D (Aa64Mmfr2) & 0xf; + Value =3D Aa64Mmfr2 & 0xf; switch (Value) { case b0000: Description =3D "FEAT_TTCNP not implemented."; @@ -1906,7 +1906,7 @@ HandleAa64Pfr0 ( CONST CHAR8 *Bits; =20 Bits =3D "3:0 "; - Value =3D (Aa64Pfr0) & 0xf; + Value =3D Aa64Pfr0 & 0xf; switch (Value) { case b0001: Description =3D "EL0 in AArch64 only"; --=20 2.40.1