From: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>
To: devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Rebecca Cran <rebecca@bsdio.com>,
Sami Mujawar <sami.mujawar@arm.com>,
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Subject: [PATCH 2/7] ArmPkg: shorten register field in ArmCpuInfo
Date: Thu, 4 May 2023 15:24:35 +0100 [thread overview]
Message-ID: <20230504142440.827531-3-marcin.juszkiewicz@linaro.org> (raw)
In-Reply-To: <20230504142440.827531-1-marcin.juszkiewicz@linaro.org>
It is hard to fit in 80 columns so let drop extra spaces and ID_AA64
prefix from system register names.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c | 36 +++++++++++-----------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c b/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c
index 3f0a49649790..982714ef6ca0 100644
--- a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c
+++ b/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c
@@ -53,7 +53,7 @@ PrintText (
CONST CHAR8 *Description
)
{
- AsciiPrint (" %-16a | %5a | %5a | %a\n", Field, Bits, Value, Description);
+ AsciiPrint ("%-5a | %5a | %5a | %a\n", Field, Bits, Value, Description);
}
/**
@@ -88,7 +88,7 @@ PrintSpacer (
VOID
)
{
- AsciiPrint ("------------------|-------|-------|----------------------------------------------\n");
+ AsciiPrint ("------|-------|-------|----------------------------------------------\n");
}
/**
@@ -102,7 +102,7 @@ HandleAa64Dfr0 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64DFR0";
+ STATIC CONST CHAR8 RegName[] = "DFR0";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -362,7 +362,7 @@ HandleAa64Isar0 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64ISAR0";
+ STATIC CONST CHAR8 RegName[] = "ISAR0";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -632,7 +632,7 @@ HandleAa64Isar1 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64ISAR1";
+ STATIC CONST CHAR8 RegName[] = "ISAR1";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -949,7 +949,7 @@ HandleAa64Isar2 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64ISAR2";
+ STATIC CONST CHAR8 RegName[] = "ISAR2";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -1091,7 +1091,7 @@ HandleAa64Mmfr0 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64MMFR0";
+ STATIC CONST CHAR8 RegName[] = "MMFR0";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -1164,11 +1164,11 @@ HandleAa64Mmfr0 (
// If mixed-endian is present, check whether supported at EL0
if (((Aa64Mmfr0 >> 8) & 0xf) != b0000 ) {
if (((Aa64Mmfr0 >> 16) & 0xf) == b0000 ) {
- PrintValues ("ID_AA64MMFR0", "19:16", b0000, "No mixed-endian support at EL0.");
+ PrintValues ("MMFR0", "19:16", b0000, "No mixed-endian support at EL0.");
}
if (((Aa64Mmfr0 >> 16) & 0xf) == b0001 ) {
- PrintValues ("ID_AA64MMFR0", "19:16", b0001, "Mixed-endian support at EL0.");
+ PrintValues ("MMFR0", "19:16", b0001, "Mixed-endian support at EL0.");
}
}
@@ -1363,7 +1363,7 @@ HandleAa64Mmfr1 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64MMFR1";
+ STATIC CONST CHAR8 RegName[] = "MMFR1";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -1480,12 +1480,12 @@ HandleAa64Mmfr1 (
(((Aa64Pfr0 >> 28) & 0xf) == b0010))
{
if (((Aa64Mmfr1 >> 24) & 0xf) == b0000 ) {
- PrintValues ("ID_AA64MMFR1", "27:24", b0000, "The PE never generates an SError interrupt due to");
+ PrintValues ("MMFR1", "27:24", b0000, "The PE never generates an SError interrupt due to");
PrintText ("", "", "", "an External abort on a speculative read.");
}
if (((Aa64Mmfr1 >> 24) & 0xf) == b0001 ) {
- PrintValues ("ID_AA64MMFR1", "27:24", b0001, "The PE might generate an SError interrupt due to");
+ PrintValues ("MMFR1", "27:24", b0001, "The PE might generate an SError interrupt due to");
PrintText ("", "", "", "an External abort on a speculative read.");
}
}
@@ -1632,7 +1632,7 @@ HandleAa64Mmfr2 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64MMFR2";
+ STATIC CONST CHAR8 RegName[] = "MMFR2";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -1901,7 +1901,7 @@ HandleAa64Pfr0 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64PFR0";
+ STATIC CONST CHAR8 RegName[] = "PFR0";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
@@ -2059,7 +2059,7 @@ HandleAa64Pfr0 (
PrintValues (RegName, Bits, Value, Description);
if (Value == b0001) {
if (((Aa64Pfr1 >> 12) & 0xf) == b0001 ) {
- PrintValues ("ID_AA64PRF1", "15:12", b0001, "FEAT_RASv1p1 implemented.");
+ PrintValues ("PRF1", "15:12", b0001, "FEAT_RASv1p1 implemented.");
}
}
@@ -2199,11 +2199,11 @@ HandleAa64Pfr0 (
PrintValues (RegName, Bits, Value, Description);
if (Value == b0001) {
if (((Aa64Pfr1 >> 32) & 0xf) == b0001 ) {
- PrintValues ("ID_AA64PRF1", "35:32", b0001, "FEAT_CSV2_1p1 implemented.");
+ PrintValues ("PRF1", "35:32", b0001, "FEAT_CSV2_1p1 implemented.");
}
if (((Aa64Pfr1 >> 32) & 0xf) == b0010 ) {
- PrintValues ("ID_AA64PRF1", "35:32", b0010, "FEAT_CSV2_1p2 implemented.");
+ PrintValues ("PRF1", "35:32", b0010, "FEAT_CSV2_1p2 implemented.");
}
}
@@ -2235,7 +2235,7 @@ HandleAa64Pfr1 (
)
{
UINT64 Value;
- STATIC CONST CHAR8 RegName[] = "ID_AA64PFR1";
+ STATIC CONST CHAR8 RegName[] = "PFR1";
CONST CHAR8 *Description;
CONST CHAR8 *Bits;
--
2.40.1
next prev parent reply other threads:[~2023-05-04 14:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-04 14:24 [PATCH 0/7] ArmCpuInfo improvements Marcin Juszkiewicz
2023-05-04 14:24 ` [PATCH 1/7] ArmPkg: fix reading of first nibbles in ArmCpuInfo Marcin Juszkiewicz
2023-05-04 14:24 ` Marcin Juszkiewicz [this message]
2023-05-04 14:24 ` [PATCH 3/7] ArmPkg: add functions to read SVE/SME info Marcin Juszkiewicz
2023-05-04 14:24 ` [PATCH 4/7] ArmPkg: skip empty system registers in ArmCpuInfo Marcin Juszkiewicz
2023-05-04 14:24 ` [PATCH 5/7] ArmPkg: format output in one place " Marcin Juszkiewicz
2023-05-04 14:24 ` [PATCH 6/7] ArmPkg: handle SVE/SME " Marcin Juszkiewicz
2023-05-04 14:24 ` [PATCH 7/7] ArmPkg: cleaning output of ArmCpuInfo Marcin Juszkiewicz
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230504142440.827531-3-marcin.juszkiewicz@linaro.org \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox