[PATCH v5 3/5] UefiCpuPkg/ResetVector: Combine PageTables1G.asm and PageTables2M.asm

["Zhiguang Liu" <zhiguang.liu@intel.com>]

Combine PageTables1G.asm and PageTables2M.asm to reuse code.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb        |  8 +--
 .../X64/{PageTables1G.asm => PageTables.asm}  | 38 ++++++++---
 .../ResetVector/Vtf0/X64/PageTables2M.asm     | 63 -------------------
 3 files changed, 33 insertions(+), 76 deletions(-)
 rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables1G.asm => PageTables.asm} (57%)
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
index bdea1fb875..136361e62c 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb
@@ -2,7 +2,7 @@
 ; @file
 ; This file includes all other code files to assemble the reset vector code
 ;
-; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ;------------------------------------------------------------------------------
@@ -38,11 +38,7 @@
 %include "PageTables.inc"
 
 %ifdef ARCH_X64
-  %ifdef PAGE_TABLE_1G
-    %include "X64/PageTables1G.asm"
-  %else
-    %include "X64/PageTables2M.asm"
-  %endif
+  %include "X64/PageTables.asm"
 %endif
 
 %ifdef DEBUG_PORT80
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
similarity index 57%
rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
rename to UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
index f5b8da0015..9b492b063f 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
@@ -1,10 +1,11 @@
 ;------------------------------------------------------------------------------
 ; @file
-; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
+; Emits Page Tables for 1:1 mapping.
+; If using 1G page table, map addresses 0 - 0x8000000000 (512GB),
+; else, map addresses 0 - 0x100000000 (4GB)
 ;
 ; Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.<BR>
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
-; Linear-Address Translation to a 1-GByte Page
 ;
 ;------------------------------------------------------------------------------
 
@@ -36,6 +37,7 @@ BITS    64
                     PAGE_NLE_ATTR)
 
 %define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR)
+%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR)
 
 ALIGN 16
 
@@ -46,14 +48,36 @@ Pml4:
     DQ      PAGE_NLE(Pdp)
     TIMES   0x1000 - ($ - Pml4) DB 0
 
+%ifdef PAGE_TABLE_1G
 Pdp:
     ;
     ; Page-directory pointer table (512 * 1GB entries => 512GB)
     ;
-%assign i 0
-%rep      512
-    DQ    PAGE_PDPTE_1GB(i)
-    %assign i i+1
-%endrep
+    %assign i 0
+    %rep      512
+        DQ    PAGE_PDPTE_1GB(i)
+        %assign i i+1
+    %endrep
+%else
+Pdp:
+    ;
+    ; Page-directory pointer table (4 * 1GB entries => 4GB)
+    ;
+    DQ      PAGE_NLE(Pd)
+    DQ      PAGE_NLE(Pd + 0x1000)
+    DQ      PAGE_NLE(Pd + 0x2000)
+    DQ      PAGE_NLE(Pd + 0x3000)
+    TIMES   0x1000 - ($ - Pdp) DB 0
 
+Pd:
+    ;
+    ; Page-Directory (2048 * 2MB entries => 4GB)
+    ; Four pages below, each is pointed by one entry in Pdp.
+    ;
+    %assign i 0
+    %rep    0x800
+        DQ      PAGE_PDE_2MB(i)
+        %assign i i+1
+    %endrep
+%endif
 EndOfPageTables:
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
deleted file mode 100644
index 731dabad4d..0000000000
--- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm
+++ /dev/null
@@ -1,63 +0,0 @@
-;------------------------------------------------------------------------------
-; @file
-; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB)
-;
-; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
-; SPDX-License-Identifier: BSD-2-Clause-Patent
-;
-;------------------------------------------------------------------------------
-
-BITS    64
-
-%define ALIGN_TOP_TO_4K_FOR_PAGING
-
-;
-; Page table big leaf entry attribute:
-; PDPTE 1GB entry or PDE 2MB entry
-;
-%define PAGE_BLE_ATTR   (PAGE_SIZE + \
-                          PAGE_ACCESSED + \
-                          PAGE_DIRTY + \
-                          PAGE_READ_WRITE + \
-                          PAGE_PRESENT)
-
-;
-; Page table non-leaf entry attribute
-;
-%define PAGE_NLE_ATTR (PAGE_ACCESSED + \
-                        PAGE_READ_WRITE + \
-                        PAGE_PRESENT)
-
-%define PAGE_NLE(address) (ADDR_OF(address) + \
-                    PAGE_NLE_ATTR)
-%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR)
-
-Pml4:
-    ;
-    ; PML4 (1 * 512GB entry)
-    ;
-    DQ      PAGE_NLE(Pdp)
-    TIMES   0x1000 - ($ - Pml4) DB 0
-
-Pdp:
-    ;
-    ; Page-directory pointer table (4 * 1GB entries => 4GB)
-    ;
-    DQ      PAGE_NLE(Pd)
-    DQ      PAGE_NLE(Pd + 0x1000)
-    DQ      PAGE_NLE(Pd + 0x2000)
-    DQ      PAGE_NLE(Pd + 0x3000)
-    TIMES   0x1000 - ($ - Pdp) DB 0
-
-Pd:
-    ;
-    ; Page-Directory (2048 * 2MB entries => 4GB)
-    ; Four pages below, each is pointed by one entry in Pdp.
-    ;
-%assign i 0
-%rep    0x800
-    DQ      PAGE_PDE_2MB(i)
-    %assign i i+1
-%endrep
-
-EndOfPageTables:
-- 
2.31.1.windows.1