From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.102325.1683533854228983101 for ; Mon, 08 May 2023 01:17:37 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=CsK6n6kE; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683533857; x=1715069857; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gU7j8/3ycTty6gCuXDCokdISHq4CLDAoQhkqNJiZ83A=; b=CsK6n6kE2cnQyI3DwAdhZk1yJCMBTDSfvz/ZHLDR6oH2YAsq/qJinJGB g+WGxPU51AWvBn8IthHyA4kV3YdMvZHxmXa7oJu8jSjzDQ1DSox4k/qz1 V20zj6TE8vSVSiIP0AHppQFwLmJKOO6yQJEeTeJ4y23DncM+d4x8C/o7n RFzgfjvOyH2s2JQJ8upo/7dsELC8UDbDQ+X5rMNaMJtaI04SVjH/2e2Wy spuo5YGutWmLZsho+G8lCTCeC4Eyte//Ehf5aE5JAZERni4j7fTT3Ly5G CBbgamUqjyGwb4Fu1WEtMWQ5w3L+1WcWnk3k92yMaStTxFPt0PhObeudy g==; X-IronPort-AV: E=McAfee;i="6600,9927,10703"; a="329948476" X-IronPort-AV: E=Sophos;i="5.99,258,1677571200"; d="scan'208";a="329948476" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 01:17:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10703"; a="731219054" X-IronPort-AV: E=Sophos;i="5.99,258,1677571200"; d="scan'208";a="731219054" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 01:17:10 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West Subject: [PATCH v5 4/5] UefiCpuPkg/ResetVector: Modify Page Table in ResetVector Date: Mon, 8 May 2023 16:15:03 +0800 Message-Id: <20230508081504.1067-5-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230508081504.1067-1-zhiguang.liu@intel.com> References: <20230508081504.1067-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In ResetVector, if create page table, its highest address is fixed because after page table, code layout is fixed(4K for normal code, and another 4K only contains reset vector code). Today's implementation organizes the page table as following if 1G page table is used: 4G-16K: PML4 page (PML4[0] points to 4G-12K) 4G-12K: PDP page CR3 is set to 4G-16K When 2M page table is used, the layout is as following: 4G-32K: PML4 page (PML4[0] points to 4G-28K) 4G-28K: PDP page (PDP entries point to PD pages) 4G-24K: PD page mapping 0-1G 4G-20K: PD page mapping 1-2G 4G-16K: PD page mapping 2-3G 4G-12K: PD page mapping 3-4G CR3 is set to 4G-32K CR3 doesn't point to a fixed location which is a bit hard to debug at runtime. The new page table layout will always put PML4 in highest address When 1G page table is used, the layout is as following: 4G-16K: PDP page 4G-12K: PML4 page (PML4[0] points to 4G-16K) When 2M page table is used, the layout is as following: 4G-32K: PD page mapping 0-1G 4G-28K: PD page mapping 1-2G 4G-24K: PD page mapping 2-3G 4G-20K: PD page mapping 3-4G 4G-16K: PDP page (PDP entries point to PD pages) 4G-12K: PML4 page (PML4[0] points to 4G-16K) CR3 is always set to 4G-12K So, this patch can improve debuggability by make sure the init CR3 pointing to a fixed address(4G-12K). Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- .../ResetVector/Vtf0/X64/PageTables.asm | 33 ++++++++++--------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm index 9b492b063f..d66fb62c34 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -41,13 +41,6 @@ BITS 64 ALIGN 16 -Pml4: - ; - ; PML4 (1 * 512GB entry) - ; - DQ PAGE_NLE(Pdp) - TIMES 0x1000 - ($ - Pml4) DB 0 - %ifdef PAGE_TABLE_1G Pdp: ; @@ -59,15 +52,6 @@ Pdp: %assign i i+1 %endrep %else -Pdp: - ; - ; Page-directory pointer table (4 * 1GB entries => 4GB) - ; - DQ PAGE_NLE(Pd) - DQ PAGE_NLE(Pd + 0x1000) - DQ PAGE_NLE(Pd + 0x2000) - DQ PAGE_NLE(Pd + 0x3000) - TIMES 0x1000 - ($ - Pdp) DB 0 Pd: ; @@ -79,5 +63,22 @@ Pd: DQ PAGE_PDE_2MB(i) %assign i i+1 %endrep +Pdp: + ; + ; Page-directory pointer table (4 * 1GB entries => 4GB) + ; + DQ PAGE_NLE(Pd) + DQ PAGE_NLE(Pd + 0x1000) + DQ PAGE_NLE(Pd + 0x2000) + DQ PAGE_NLE(Pd + 0x3000) + TIMES 0x1000 - ($ - Pdp) DB 0 + %endif + +Pml4: + ; + ; PML4 (1 * 512GB entry) + ; + DQ PAGE_NLE(Pdp) + TIMES 0x1000 - ($ - Pml4) DB 0 EndOfPageTables: -- 2.31.1.windows.1