From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.360.1683819606577900248 for ; Thu, 11 May 2023 08:40:07 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=softfail (domain: linaro.org, ip: 213.251.184.221, mailfrom: marcin.juszkiewicz@linaro.org) Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 9DCBB26007F; Thu, 11 May 2023 17:40:04 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7V_ikS-EDJZW; Thu, 11 May 2023 17:40:02 +0200 (CEST) Received: from applejack.lan (83.11.34.59.ipv4.supernova.orange.pl [83.11.34.59]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 7458F26066D; Thu, 11 May 2023 17:40:02 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Rebecca Cran , Sami Mujawar , Marcin Juszkiewicz Subject: [PATCH v5 2/2] Platform/SbsaQemu: read GIC base from TF-A Date: Thu, 11 May 2023 17:39:55 +0200 Message-Id: <20230511153955.320934-2-marcin.juszkiewicz@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230511153955.320934-1-marcin.juszkiewicz@linaro.org> References: <20230511153955.320934-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Qemu has versioning for sbsa-ref platform. TF-A reads data from provided DeviceTree and provides as SMC. This change adds reading GIC base addresses into EDK2. Signed-off-by: Marcin Juszkiewicz --- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 24 +++++++++++++++++++ .../SbsaQemuPlatformDxe.inf | 4 ++++ 2 files changed, 28 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPl= atformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuP= latformDxe.c index 199766c7014a..82c349971625 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformD= xe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformD= xe.c @@ -25,6 +25,8 @@ #define SIP_FUNCTION_ID(n) (SIP_FUNCTION | (n)) =20 #define SIP_SVC_VERSION SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GICD SIP_FUNCTION_ID(2) +#define SIP_SVC_GET_GICR SIP_FUNCTION_ID(3) =20 EFI_STATUS EFIAPI @@ -78,5 +80,27 @@ InitializeSbsaQemuPlatformDxe ( =20 DEBUG ((DEBUG_INFO, "Platform version: %d.%d\n", Arg0, Arg1)); =20 + Result =3D ArmCallSmc0 (SIP_SVC_GET_GICD, &Arg0, NULL, NULL); + if (Result =3D=3D SMC_ARCH_CALL_SUCCESS) + { + Result =3D PcdSet32S (PcdGicDistributorBase, Arg0); + ASSERT_EFI_ERROR (Result); + } + + Arg0 =3D PcdGet32 (PcdGicDistributorBase); + + DEBUG ((DEBUG_INFO, "GICD base: 0x%x\n", Arg0)); + + Result =3D ArmCallSmc0 (SIP_SVC_GET_GICR, &Arg0, NULL, NULL); + if (Result =3D=3D SMC_ARCH_CALL_SUCCESS) + { + Result =3D PcdSet32S (PcdGicRedistributorsBase, Arg0); + ASSERT_EFI_ERROR (Result); + } + + Arg0 =3D PcdGet32 (PcdGicRedistributorsBase); + + DEBUG ((DEBUG_INFO, "GICR base: 0x%x\n", Arg0)); + return EFI_SUCCESS; } diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPl= atformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQem= uPlatformDxe.inf index 1f2c8a9dd6af..545794a8c7ff 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformD= xe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformD= xe.inf @@ -41,6 +41,10 @@ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor =20 + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + + [Depex] TRUE =20 --=20 2.40.1