From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by mx.groups.io with SMTP id smtpd.web10.31577.1683914286493800719 for ; Fri, 12 May 2023 10:58:06 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nBOy4dkV; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: quicinc.com, ip: 205.220.180.131, mailfrom: quic_llindhol@quicinc.com) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34CDlkQr017619; Fri, 12 May 2023 17:58:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=IaZhdcK+DiKayLk5KyENt7i0MoiVo4PofCFyd+bVCf4=; b=nBOy4dkVrVPb8TPh1FM+H5eG8h6Q1MB0Ez6dY97nQ+X3t1d9278itUo6/wkLTM4pZV+c M6ykd2i8pvcwvsl1+HhdoRG9XdQmN0N4Wdi07mbvsRhWgsCkQ1qtz1zJxITpagOcnUPS PKqgdjtERwKywt1gwb3Ic7bleAeG+lTH4xqjX446q6KeTqqCBJNSZARbQ3BxJQrlY7d3 lwBlbDLZguPlOAqA8adtaBzkLPAJuH1O8WgEkifhtRzHem3bVob7iZeDZmEQZFqJJ0Ui 7poIziJuG2NRgEjx8ph7xJ7ZfYdJe1YnA2Iab8MxkPNdF0eRYkz2F2zKBb2lN6NyPrEP kg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qhes21ntq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 12 May 2023 17:58:05 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34CHw4s1023867 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 12 May 2023 17:58:04 GMT Received: from qc-i7.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 12 May 2023 10:58:02 -0700 From: "Leif Lindholm" To: CC: Ard Biesheuvel , Graeme Gregory , Radoslaw Biernacki , Marcin Juszkiewicz Subject: [PATCH edk2-platforms 1/2] Silicon/Qemu: use 64-bit Pcds for SbsaQemu GIC addresses Date: Fri, 12 May 2023 18:57:52 +0100 Message-ID: <20230512175753.13318-2-quic_llindhol@quicinc.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230512175753.13318-1-quic_llindhol@quicinc.com> References: <20230512175753.13318-1-quic_llindhol@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: rfkr1VeMx5qWHZg9tR3HCn32iXLo_uFM X-Proofpoint-GUID: rfkr1VeMx5qWHZg9tR3HCn32iXLo_uFM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-12_10,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 adultscore=0 mlxscore=0 suspectscore=0 mlxlogscore=792 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305120150 Content-Transfer-Encoding: 8bit Content-Type: text/plain gArmTokenSpaceGuid.PcdGicDistributorBase and gArmTokenSpaceGuid.PcdGicRedistributorsBase are both defined as UINT64 in ArmPkg.dec, but SbsaQemuAcpiDxe and its exported header file use PcdGet32. While this currently works, it will break once these Pcds are made dynamic - so fix. Signed-off-by: Leif Lindholm Cc: Ard Biesheuvel Cc: Graeme Gregory Cc: Radoslaw Biernacki Cc: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 2 +- Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 4d5b05ba17c6..dcafcbca5a48 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -33,7 +33,7 @@ EFI_ACPI_6_0_GICR, /* Type */ \ sizeof (EFI_ACPI_6_0_GICR_STRUCTURE), /* Length */ \ EFI_ACPI_RESERVED_WORD, /* Reserved */ \ - FixedPcdGet32 (PcdGicRedistributorsBase), /* DiscoveryRangeBaseAddress */ \ + FixedPcdGet64 (PcdGicRedistributorsBase), /* DiscoveryRangeBaseAddress */ \ SBSAQEMU_MADT_GICR_SIZE /* DiscoveryRangeLength */ \ } diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 7ba9e8e9deeb..58330a3e7005 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -83,7 +83,7 @@ AddMadtTable ( EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE Gicd = EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT ( 0, - FixedPcdGet32 (PcdGicDistributorBase), + FixedPcdGet64 (PcdGicDistributorBase), 0, 3 /* GicVersion */ ); -- 2.30.2