From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.79063.1684114912782651376 for ; Sun, 14 May 2023 18:41:53 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=XRwjz4Zx; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684114912; x=1715650912; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=7GYEXsBjXe1IBQz5XIN8SvvbGhRuh4NVjqM8XycBUYU=; b=XRwjz4Zx5/UR7LBatyhRuGg+5hUktPBYyo46jthoENaOYTAcBf6gddcr IxHDpKl+GlytDmAGAXXYVrvY/NwG7xBDxqMR6jOEwbu1ECYol5DEsT9go WV54UgZtdFROIUH1n+Il4tGF25MaR/p3PGM+U41baXDCrpFfxrWZ39UBb lAsJKgRmBpJ9ZjEMuzWbnXZW0C8GU7UTZ9g3gwH0vy/MYRm/TzUodp2Vf NOrMuiyLHn5qNnAehV6u8bU8ygC9lZPU94ZMzQrCa/NJuu+YzMQVSE5xI OopjB+e38sbDmSf8tzLzHuJMZRvyOMQNAbfwh+Sqrdk+U+ZtdDAtP05T7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="331457148" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="331457148" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 18:41:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="824986964" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="824986964" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 18:41:51 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu Subject: [PATCH v6 0/5] UefiCpuPkg/ResetVector: Refine page table creation, and support 5 Level paging Date: Mon, 15 May 2023 09:41:33 +0800 Message-Id: <20230515014138.1321-1-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch set simplify the page table creation code, remove some hard-code, combine files and support 5 Level paging. V4: Refine comments and update below macro names: PG_NLE -> PAGE_NLE PTE_2MB -> PDE_2MB PDP_1G -> PDPTE_1GB PAGE_BLP_ATTR -> PAGE_BLE_ATTR No code logic impact V5: Update below macro names: PDE_2MB -> PAGE_PDE_2MB PDPTE_1GB -> PAGE_PDPTE_1GB No code logic impact V6: Only change the 5th patch to be compatible with reset vector code from OvmfPkg. Other patches keep unchagned. Zhiguang Liu (5): UefiCpuPkg/ResetVector: Rename macros about page table. UefiCpuPkg/ResetVector: Simplify page table creation in ResetVector UefiCpuPkg/ResetVector: Combine PageTables1G.asm and PageTables2M.asm UefiCpuPkg/ResetVector: Modify Page Table in ResetVector UefiCpuPkg/ResetVector: Support 5 level page table in ResetVector .../ResetVector/Vtf0/Ia32/PageTables64.asm | 24 ++++- UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +- .../ResetVector/Vtf0/X64/PageTables.asm | 93 +++++++++++++++++++ .../ResetVector/Vtf0/X64/PageTables1G.asm | 53 ----------- .../ResetVector/Vtf0/X64/PageTables2M.asm | 60 ------------ 5 files changed, 117 insertions(+), 121 deletions(-) create mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm -- 2.31.1.windows.1