From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.79068.1684114925302985385 for ; Sun, 14 May 2023 18:42:07 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=awDAkiNt; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684114927; x=1715650927; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=StqwdWeX3eHaDivq3TUCrALWupGihu9qqPKragTSlos=; b=awDAkiNt0fFjc+u3PHSAC0f3Xyu7xt1BiKaZCth5qmrlBvjf7jGWyexl O4em+/6IZDibivoFxSYrR3zQqC1rvmlkfqVxwnBAZU01mT4aH1o7Pr9M6 EVidivdoffmp+ZeIcW3lGqtD834d/evt5CHFeq/OYzcgTNt1FN9v14Es+ j4WGlGv0TElknLjCNszVHZQSFGRC5AtI2tXh58RGEnYAhPPhmL+Lake4K eVyyZG/oVJ069k42m2wvbTOn8dR9Q18HVRYHHh+SJSNIFZb3l2iWCm7dx U/e37f4S9i9o2716tX86VIjIs97ORyIUYm+qt/uZmSYmsVNSaEiXhz7QB w==; X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="331457208" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="331457208" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 18:42:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="824987052" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="824987052" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 18:42:04 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: "Liu, Zhiguang" , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West , Zhiguang Liu Subject: [PATCH v6 2/5] UefiCpuPkg/ResetVector: Simplify page table creation in ResetVector Date: Mon, 15 May 2023 09:41:35 +0800 Message-Id: <20230515014138.1321-3-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230515014138.1321-1-zhiguang.liu@intel.com> References: <20230515014138.1321-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: "Liu, Zhiguang" Currently, page table creation has many hard-code values about the offset to the start of page table. To simplify it, add Labels such as Pml4, Pdp and Pd, so that we can remove many hard-code values Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- .../ResetVector/Vtf0/Ia32/PageTables64.asm | 4 +-- .../ResetVector/Vtf0/X64/PageTables1G.asm | 18 ++++------ .../ResetVector/Vtf0/X64/PageTables2M.asm | 34 ++++++++----------- 3 files changed, 24 insertions(+), 32 deletions(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm index 87a4125d4b..f188da20ba 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm @@ -2,7 +2,7 @@ ; @file ; Sets the CR3 register for 64-bit paging ; -; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.
+; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ;------------------------------------------------------------------------------ @@ -17,7 +17,7 @@ SetCr3ForPageTables64: ; ; These pages are built into the ROM image in X64/PageTables.asm ; - mov eax, ADDR_OF(TopLevelPageDirectory) + mov eax, ADDR_OF(Pml4) mov cr3, eax OneTimeCallRet SetCr3ForPageTables64 diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm index 20a61f949c..f5b8da0015 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm @@ -29,35 +29,31 @@ BITS 64 PAGE_PRESENT + \ PAGE_SIZE) -%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory) -%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x)) - ; ; Page table non-leaf entry ; -%define PAGE_NLE(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \ +%define PAGE_NLE(address) (ADDR_OF(address) + \ PAGE_NLE_ATTR) %define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR) ALIGN 16 -TopLevelPageDirectory: - +Pml4: ; - ; Top level Page Directory Pointers (1 * 512GB entry) + ; PML4 (1 * 512GB entry) ; - DQ PAGE_NLE(0x1000) + DQ PAGE_NLE(Pdp) + TIMES 0x1000 - ($ - Pml4) DB 0 - TIMES 0x1000-PGTBLS_OFFSET($) DB 0 +Pdp: ; - ; Next level Page Directory Pointers (512 * 1GB entries => 512GB) + ; Page-directory pointer table (512 * 1GB entries => 512GB) ; %assign i 0 %rep 512 DQ PAGE_PDPTE_1GB(i) %assign i i+1 %endrep - TIMES 0x2000-PGTBLS_OFFSET($) DB 0 EndOfPageTables: diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm index 1221b023fe..731dabad4d 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm @@ -28,36 +28,32 @@ BITS 64 PAGE_READ_WRITE + \ PAGE_PRESENT) -%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory) -%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x)) - -%define PAGE_NLE(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \ +%define PAGE_NLE(address) (ADDR_OF(address) + \ PAGE_NLE_ATTR) %define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR) -TopLevelPageDirectory: - +Pml4: ; - ; Top level Page Directory Pointers (1 * 512GB entry) + ; PML4 (1 * 512GB entry) ; - DQ PAGE_NLE(0x1000) - + DQ PAGE_NLE(Pdp) + TIMES 0x1000 - ($ - Pml4) DB 0 +Pdp: ; - ; Next level Page Directory Pointers (4 * 1GB entries => 4GB) + ; Page-directory pointer table (4 * 1GB entries => 4GB) ; - TIMES 0x1000-PGTBLS_OFFSET($) DB 0 - - DQ PAGE_NLE(0x2000) - DQ PAGE_NLE(0x3000) - DQ PAGE_NLE(0x4000) - DQ PAGE_NLE(0x5000) + DQ PAGE_NLE(Pd) + DQ PAGE_NLE(Pd + 0x1000) + DQ PAGE_NLE(Pd + 0x2000) + DQ PAGE_NLE(Pd + 0x3000) + TIMES 0x1000 - ($ - Pdp) DB 0 +Pd: ; - ; Page Table Entries (2048 * 2MB entries => 4GB) + ; Page-Directory (2048 * 2MB entries => 4GB) + ; Four pages below, each is pointed by one entry in Pdp. ; - TIMES 0x2000-PGTBLS_OFFSET($) DB 0 - %assign i 0 %rep 0x800 DQ PAGE_PDE_2MB(i) -- 2.31.1.windows.1