From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.79068.1684114925302985385 for ; Sun, 14 May 2023 18:42:10 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=cNKHj9rf; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684114929; x=1715650929; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yK6liWuVNhjwLTuJnt4ckUUBitNFgFsqh2dkllMNxGM=; b=cNKHj9rfovL8SLTOtbwE+OWzqQyorW6a0noRXDx8UuoCXx0ur6uqyS/F IdKmx+WVbIfWwFmCDnVavarMPx3ge+TkNYI0HNwTQzXEJTNs4nEVxEfiS 0VsTkhnVQkpjy1szuqOdseUk629bbR+7bUXEupj/rp8AczGS+8fxB/iOK w5uDi/09VTbzu9SqCnzHFC8I6noCz9WAsrTqNRlslFcvGVYJgxaB2CHb2 Na+IKNojFd5iA06NMrKRs1uWrQmurK2TI5hoQFqsoVg9Y+gxnE2XL0pY5 VQ9iQ3WKFTao4iHGJQ3qw0zYU4WPRPZMGZUAOrBMaGedoH4B9u9bymFn2 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="331457228" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="331457228" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 18:42:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="824987080" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="824987080" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 18:42:07 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: "Liu, Zhiguang" , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West , Zhiguang Liu Subject: [PATCH v6 3/5] UefiCpuPkg/ResetVector: Combine PageTables1G.asm and PageTables2M.asm Date: Mon, 15 May 2023 09:41:36 +0800 Message-Id: <20230515014138.1321-4-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230515014138.1321-1-zhiguang.liu@intel.com> References: <20230515014138.1321-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: "Liu, Zhiguang" Combine PageTables1G.asm and PageTables2M.asm to reuse code. Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-- .../X64/{PageTables1G.asm => PageTables.asm} | 38 ++++++++--- .../ResetVector/Vtf0/X64/PageTables2M.asm | 63 ------------------- 3 files changed, 33 insertions(+), 76 deletions(-) rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables1G.asm => PageTables.asm} (57%) delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb index bdea1fb875..136361e62c 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb @@ -2,7 +2,7 @@ ; @file ; This file includes all other code files to assemble the reset vector code ; -; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.
+; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ;------------------------------------------------------------------------------ @@ -38,11 +38,7 @@ %include "PageTables.inc" %ifdef ARCH_X64 - %ifdef PAGE_TABLE_1G - %include "X64/PageTables1G.asm" - %else - %include "X64/PageTables2M.asm" - %endif + %include "X64/PageTables.asm" %endif %ifdef DEBUG_PORT80 diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm similarity index 57% rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm rename to UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm index f5b8da0015..9b492b063f 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -1,10 +1,11 @@ ;------------------------------------------------------------------------------ ; @file -; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB) +; Emits Page Tables for 1:1 mapping. +; If using 1G page table, map addresses 0 - 0x8000000000 (512GB), +; else, map addresses 0 - 0x100000000 (4GB) ; ; Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent -; Linear-Address Translation to a 1-GByte Page ; ;------------------------------------------------------------------------------ @@ -36,6 +37,7 @@ BITS 64 PAGE_NLE_ATTR) %define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR) +%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR) ALIGN 16 @@ -46,14 +48,36 @@ Pml4: DQ PAGE_NLE(Pdp) TIMES 0x1000 - ($ - Pml4) DB 0 +%ifdef PAGE_TABLE_1G Pdp: ; ; Page-directory pointer table (512 * 1GB entries => 512GB) ; -%assign i 0 -%rep 512 - DQ PAGE_PDPTE_1GB(i) - %assign i i+1 -%endrep + %assign i 0 + %rep 512 + DQ PAGE_PDPTE_1GB(i) + %assign i i+1 + %endrep +%else +Pdp: + ; + ; Page-directory pointer table (4 * 1GB entries => 4GB) + ; + DQ PAGE_NLE(Pd) + DQ PAGE_NLE(Pd + 0x1000) + DQ PAGE_NLE(Pd + 0x2000) + DQ PAGE_NLE(Pd + 0x3000) + TIMES 0x1000 - ($ - Pdp) DB 0 +Pd: + ; + ; Page-Directory (2048 * 2MB entries => 4GB) + ; Four pages below, each is pointed by one entry in Pdp. + ; + %assign i 0 + %rep 0x800 + DQ PAGE_PDE_2MB(i) + %assign i i+1 + %endrep +%endif EndOfPageTables: diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm deleted file mode 100644 index 731dabad4d..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm +++ /dev/null @@ -1,63 +0,0 @@ -;------------------------------------------------------------------------------ -; @file -; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB) -; -; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
-; SPDX-License-Identifier: BSD-2-Clause-Patent -; -;------------------------------------------------------------------------------ - -BITS 64 - -%define ALIGN_TOP_TO_4K_FOR_PAGING - -; -; Page table big leaf entry attribute: -; PDPTE 1GB entry or PDE 2MB entry -; -%define PAGE_BLE_ATTR (PAGE_SIZE + \ - PAGE_ACCESSED + \ - PAGE_DIRTY + \ - PAGE_READ_WRITE + \ - PAGE_PRESENT) - -; -; Page table non-leaf entry attribute -; -%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ - PAGE_READ_WRITE + \ - PAGE_PRESENT) - -%define PAGE_NLE(address) (ADDR_OF(address) + \ - PAGE_NLE_ATTR) -%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR) - -Pml4: - ; - ; PML4 (1 * 512GB entry) - ; - DQ PAGE_NLE(Pdp) - TIMES 0x1000 - ($ - Pml4) DB 0 - -Pdp: - ; - ; Page-directory pointer table (4 * 1GB entries => 4GB) - ; - DQ PAGE_NLE(Pd) - DQ PAGE_NLE(Pd + 0x1000) - DQ PAGE_NLE(Pd + 0x2000) - DQ PAGE_NLE(Pd + 0x3000) - TIMES 0x1000 - ($ - Pdp) DB 0 - -Pd: - ; - ; Page-Directory (2048 * 2MB entries => 4GB) - ; Four pages below, each is pointed by one entry in Pdp. - ; -%assign i 0 -%rep 0x800 - DQ PAGE_PDE_2MB(i) - %assign i i+1 -%endrep - -EndOfPageTables: -- 2.31.1.windows.1