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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2023 13:04:43.1358 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2f9494b0-f5ad-4bd1-a5f7-08db5b8e46a3 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT007.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB9575 Content-Type: text/plain According to the GIC architecture version 3 and 4 specification, the maximum number of INTID bits supported in the CPU interface is 24. Considering this the RegShift variable is not required to be more than 8 bits. Therefore, make the RegShift variable type to UINT8. Also add necessary typecasts when calculating the RegOffset and RegShift values. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 24 ++++++++++---------- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 8 +++---- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c index 0127cca3bf0567bc80702f415e9cbb9bd2709fbc..8f3315d76f6f2b28a551d73400938430ff3e23c7 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -228,13 +228,13 @@ ArmGicSetInterruptPriority ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; // Calculate register offset and bit position - RegOffset = Source / 4; - RegShift = (Source % 4) * 8; + RegOffset = (UINT32)(Source / 4); + RegShift = (UINT8)((Source % 4) * 8); Revision = ArmGicGetSupportedArchRevision (); if ((Revision == ARM_GIC_ARCH_REVISION_2) || @@ -272,13 +272,13 @@ ArmGicEnableInterrupt ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; + RegOffset = (UINT32)(Source / 32); + RegShift = (UINT8)(Source % 32); Revision = ArmGicGetSupportedArchRevision (); if ((Revision == ARM_GIC_ARCH_REVISION_2) || @@ -317,13 +317,13 @@ ArmGicDisableInterrupt ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; + RegOffset = (UINT32)(Source / 32); + RegShift = (UINT8)(Source % 32); Revision = ArmGicGetSupportedArchRevision (); if ((Revision == ARM_GIC_ARCH_REVISION_2) || @@ -361,14 +361,14 @@ ArmGicIsInterruptEnabled ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; UINT32 Interrupts; // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; + RegOffset = (UINT32)(Source / 32); + RegShift = (UINT8)(Source % 32); Revision = ArmGicGetSupportedArchRevision (); if ((Revision == ARM_GIC_ARCH_REVISION_2) || diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c index fb40f56ff9231f3a28c3d90939bfd25ac3432f89..ba43150fe57015994573d82c88d6a8d9f3174533 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -2,7 +2,7 @@ Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2011-2021, Arm Ltd. All rights reserved.
+Portions copyright (c) 2011-2023, Arm Ltd. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -393,7 +393,7 @@ GicV2DxeInitialize ( EFI_STATUS Status; UINTN Index; UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; UINT32 CpuTarget; // Make sure the Interrupt Controller Protocol is not already installed in @@ -408,8 +408,8 @@ GicV2DxeInitialize ( GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index); // Set Priority - RegOffset = Index / 4; - RegShift = (Index % 4) * 8; + RegOffset = (UINT32)(Index / 4); + RegShift = (UINT8)((Index % 4) * 8); MmioAndThenOr32 ( mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), ~(0xff << RegShift), -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'