From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (NAM12-MW2-obe.outbound.protection.outlook.com [40.107.244.131]) by mx.groups.io with SMTP id smtpd.web11.1188.1684888871018629771 for ; Tue, 23 May 2023 17:41:11 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="body hash did not verify" header.i=@os.amperecomputing.com header.s=selector2 header.b=kzn0wDoI; spf=pass (domain: os.amperecomputing.com, ip: 40.107.244.131, mailfrom: minhnguyen1@os.amperecomputing.com) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Zif3nZJ6e7NYsoFm8wsi+PUaAHeMOLhBK34VWpa/XsAM51WlTfdeZNLl39cYjEaiXj8HtPrAcEKgf+tjOh45zMW54uNYNiDE8JtUyXHykSEf+2Wk8o8u0XpTWCW4PpSUpEK5XEKHifVEYEiP5KdWnDR/r8k1btrLLl/dFnK3qJfDTnQeDeo8C05AYpBNGjKBIJtMVDwu6px05kAHdM8Ni6P7AVgJ5EDjdv1UQLt2Bq0xhHaZZFKuSOw01YyX3ReB+ttev/m1ByO7RooPadxuK3ny7mGEEv6RwvK63kOcFylAaNxpFxdRJgIN3VW0Yd/5OeJY1pfn1zAYZotGEM3R0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=JHVuf6iGwdEyZ3bYAsHycB4JPLIG8cfsiFopIcpnRqE=; b=QZIn5N6uU/V8371b9HaIYzUNE/cTuFEyWn5XS9Q4NwAgyTrWAfX0tC94ExPXK6ZXpQdW8BWHcS4VXO6CfFg3WOx56j3R28l0k5miqfhfrN4EX7qRrKRHjaT9CgXP70pX4jDPlvt3RPl3kDmVGT5C6NaNbLcKuXpXOM6ZFKcfaQ2jW5jiixo4fJPsuGBfZT92SYDGbLLV9Culiyb7z0fiue4zmWZvOrLYXUmpXj5X7nIOT6oClQd7k9bpF/FiiC5zMJbX0UZ8PXByNu9qd8vf6VWoUY+O1Az4qmiR1KFJUukCxxfvuo5cDKFP8t/Eb41rBycA2QqIhAfPvcTpRKfyAg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=os.amperecomputing.com; dmarc=pass action=none header.from=os.amperecomputing.com; dkim=pass header.d=os.amperecomputing.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=os.amperecomputing.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JHVuf6iGwdEyZ3bYAsHycB4JPLIG8cfsiFopIcpnRqE=; b=kzn0wDoIrJJIdkXc/ymg5XNqfQrkbOgukFvIobojrdQ4zNp7iOZ+ydTQQJPZaWpyJRMajn95xXZ0dQMWl03LKvjhrN/GS5OVpao0ZPUoYykX2UyACF1GdvDiLR+d9gMDC4Tgi6Ckyl6Bfd2e6aoqowObkXXrA6m3BNywVR3Cm54= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=os.amperecomputing.com; Received: from PH0PR01MB8048.prod.exchangelabs.com (2603:10b6:510:280::7) by MW6PR01MB8270.prod.exchangelabs.com (2603:10b6:303:241::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.28; Wed, 24 May 2023 00:41:07 +0000 Received: from PH0PR01MB8048.prod.exchangelabs.com ([fe80::bbdb:b58c:140e:c4e1]) by PH0PR01MB8048.prod.exchangelabs.com ([fe80::bbdb:b58c:140e:c4e1%6]) with mapi id 15.20.6411.019; Wed, 24 May 2023 00:41:07 +0000 From: Minh Nguyen To: devel@edk2.groups.io CC: patches@amperecomputing.com, quic_llindhol@quicinc.com, ardb+tianocore@kernel.org, nhi@os.amperecomputing.com, minhnguyen1@os.amperecomputing.com Subject: [edk2-platforms][PATCH 4/4] JadePkg: Add support SMBIOS Table Type 16, 17, 19 Date: Wed, 24 May 2023 07:40:37 +0700 Message-ID: <20230524004037.39269-5-minhnguyen1@os.amperecomputing.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230524004037.39269-1-minhnguyen1@os.amperecomputing.com> References: <20230524004037.39269-1-minhnguyen1@os.amperecomputing.com> X-ClientProxiedBy: SI2P153CA0021.APCP153.PROD.OUTLOOK.COM (2603:1096:4:190::20) To PH0PR01MB8048.prod.exchangelabs.com (2603:10b6:510:280::7) Return-Path: minhnguyen1@os.amperecomputing.com MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR01MB8048:EE_|MW6PR01MB8270:EE_ X-MS-Office365-Filtering-Correlation-Id: 0363d1d8-dead-44d7-9ec5-08db5bef8ff1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gmLfrGTeJAk8f9mkrqc8FbgSd8KXbOSo40rKZ9enlwIgu//HU5wm+vWHEvSh1rt1Tj26yU5uJ9wJ+8F7SjDg2h3hY/yZv6XkGXcy40HhmwlSdkVtMXkUu6lkva5G4wLY8po+YtVIKQ43ND8DaA4PoF/SJ/910iHl+Bve3ULDRArr1OLYhtivIksZsT/dO0gDVdhVL2hFQ8tvoyF1kCg35jDDXTOweO0u3w2Fx7Mg1zqV2MRGI2WZChxD2iF/NWJ7qAFGrh9l6eeOC67scw8Y0s8V8Vljfrlrr1bjPuKtzK+aH2TzkxS+mls5Bg8Tg/j5W2YkCnYN7PtArlYRqZb2OKuDvav5I0o6vHrraVTIeMqHRJsksDt4chp477bGGOMtbUNuLVS3w/lbzcwThr6r0ANw5LaZQcdwVBMx8hNpsAyzAIEmWsf8KFLkd7LZImk1iezTd/Ey7M6xjrx4QYpr12GylRM2CEOHFRE0ZNldalJbYA+x1ZnxD3ve3bvUWmkjKBNtB+oKUjjlnP489vL4KgbBLo01ZYt7hXS8OeMfCOQsele+NeFsGCv5wDBcRjv/R+HSaVwcVGtdxDwCABJWrCgyLGfbV2RjIyhb9ZRN4BIU4WREWrpX2SaBwFlqqRgK X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PH0PR01MB8048.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230028)(4636009)(376002)(39850400004)(346002)(396003)(366004)(136003)(451199021)(38350700002)(30864003)(83380400001)(41300700001)(2906002)(8676002)(6666004)(6486002)(52116002)(8936002)(5660300002)(38100700002)(2616005)(86362001)(26005)(186003)(1076003)(478600001)(6506007)(6512007)(19627235002)(107886003)(66556008)(66476007)(66946007)(6916009)(4326008)(316002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?tWQWlG+8jDyGAEH/ph+KBuDANaNQQeUvrw9GxcFc1+xAlaDp2SVpuryC2UU9?= =?us-ascii?Q?EloR9d3/Jf4gBk5yAW6uJ1PmF7lecigXcEjEZIN4IiptadSaOA1lt/l2mroi?= =?us-ascii?Q?fBm7hkXNXejh0z1M6MXNMtDhAmD5ATwPacTkIPgY2yd3vrziEFgHfsg64uRE?= =?us-ascii?Q?UuaiowjbCwGQ1iSqreuBx0DI2teGza8SwJ+TxxUew3ygt4PUEgFNdTUQrteH?= =?us-ascii?Q?kJFMkaW2PgLlAB+dVx3hTqQLV3Pd5olEs/IbOi/IL9wAy1SE3GtGcW3iP2uK?= =?us-ascii?Q?2SAcgevcYr1HiGSkCuOwf+V7el81iCw4zKHRJX6RfjLgT4UTtfAbczC0faHy?= =?us-ascii?Q?jXcby9QCVvLRCED7fiuSnXC0cV9C2ew/KHh/ZfUKMxzBOt/0WXLtp6lnmLYF?= =?us-ascii?Q?Hoi40a7mUd47c/YhdVgKIiWbdHOp29eiprfaIDJ2uKWNH8SH+PDm+T5MRX/J?= =?us-ascii?Q?9lk09B03Ld/j1QkbM6r/EfIRvegDkU95IdAKX3EKmyUyQJnAlo7132OLEsR0?= =?us-ascii?Q?zDNUOn978pVeLjYUxSyOhBx70QxWu6Vne41yRjiUsq4968B74K++MOT6uSkb?= =?us-ascii?Q?+jtkZp9EYtb3ws8WCSszBNBbeTusrTBE5+rYFX6778nB2p3OozsaJDem1qUh?= =?us-ascii?Q?Yso3LiM33EXRmUFGyjPwXk9JtezC8lDH1EabbzNqVv6KpTURWmwKjazTb0Vl?= =?us-ascii?Q?dlcP98SaxG13zU0FAOdgwqYHfiqc6Vh1ma2EdJBkwCtq1MmwdO8MS6HYjUY4?= =?us-ascii?Q?5BlQ2hvxyZvBbzFIpjQ9YSY+kjB+6s24PjfCYSR4bW/AVVvYVxBH5n1icBvK?= =?us-ascii?Q?PWvsk3RxD50Dk+40/9Ard4iCi9IalGDhp+2s+JYgWqRzFIHX0iHHFAtE9RVw?= =?us-ascii?Q?q4aU7Ti9toCPeddoab6fBAbmtcl0H/WKduz8ZG9UgatAS5yrGWeqdHuwzdiY?= =?us-ascii?Q?d+y+Br6JPs7Vfh5FgGf+pK0eFAYZookGoUrEE9daQiRPqa5mQTl7H6Ll0oVe?= =?us-ascii?Q?BfG355QIS+JrG/wjnMNt2Ib2LqOjwAhjQ4SXa3U+TjPK3cBTf7G8/aAXqO+D?= =?us-ascii?Q?rPzEzcl84OCtOulLI3fAagcYrlqEY5FfRG7a+uEIsR6EHvcITzWwe8ONh2kR?= =?us-ascii?Q?z6lwDAamDI3DjMhwiur2PtRUmqECab7K0oeaEx0XjK34HCZtaEX7VB7JDXe+?= =?us-ascii?Q?AS0R3M5e17YnPYOR9yDZLGII1UFOfHDumndfIQNmMxXaMDlExvEm3ulIC1L1?= =?us-ascii?Q?nWB7J7iv0bavWcq5LheF3WYhT/0hNgL/KHB+qGRwB3H0fNFqTe++zjossC4H?= =?us-ascii?Q?84JZVwkdQXLpcUBVLFqLeO2boOinj/TP6L7TYn7dJYoEw0MhL80IlaRlwJFn?= =?us-ascii?Q?2qB0GwFOQxnZ4GdBTqMDiOs6zvxnnflK2JxxAbv1BihyAZRNTT0UkkQU5cTc?= =?us-ascii?Q?hvgLRUWWzcSWsRtSZujnckZ8CzNA0BhKdBjhpja21JWRl6N8HRUH1Kg2pkmS?= =?us-ascii?Q?lo4eCZHRJH7nDY/kqWY82P0xufiiFACnnpbSCJQmPGa9NhBY8yn6/kgIwfUS?= =?us-ascii?Q?GSZW9uvKID0QnWu4cqV4XNiHbw6IHYpreTnGubiCOqYsw0qz9zFGZyfazoq0?= =?us-ascii?Q?D2R5VGOcb7c2QM0ZyxM1Ys6oUiBzsitlT3hSUB/QqY9P?= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0363d1d8-dead-44d7-9ec5-08db5bef8ff1 X-MS-Exchange-CrossTenant-AuthSource: PH0PR01MB8048.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2023 00:41:07.7314 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 7yZ8vM0G5UyYOzYC6L4BJq3u3rh2kzEithhWYnktFoEpu7Bc6OfvD2KEXnXzBT4STrZl6g4XoK+FHoYTMQG765v0fjUP0vY9lKNTg99l3qq/IpU03f02qBkNxdc+iM17 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR01MB8270 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain This adds support SMBIOS Tables Type 16, 17, 19 for information of Physical Memory, Memory Device and Memory Array Mapped Address. Signed-off-by: Minh Nguyen --- Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf = | 6 + Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h = | 24 + Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxeDataTab= le.c | 26 +- Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type16/PlatformPhysicalM= emoryArrayData.c | 48 ++ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type16/PlatformPhysicalM= emoryArrayFunction.c | 44 ++ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/PlatformMemoryDev= iceData.c | 63 +++ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/PlatformMemoryDev= iceFunction.c | 475 ++++++++++++++++++++ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type19/PlatformMemoryArr= ayMappedAddressData.c | 47 ++ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type19/PlatformMemoryArr= ayMappedAddressFunction.c | 150 +++++++ Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLibCommon.c = | 42 ++ Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxeStrings= .uni | 1 + Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/PlatformMemoryDev= ice.uni | 16 + 12 files changed, 941 insertions(+), 1 deletion(-) diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatfo= rmDxe.inf b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatfor= mDxe.inf index 83ff918fc42d..13ae38de01f8 100755 --- a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.i= nf +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.i= nf @@ -25,6 +25,12 @@ [Sources] Type09/PlatformSystemSlotFunction.c Type11/PlatformOemStringData.c Type11/PlatformOemStringFunction.c + Type16/PlatformPhysicalMemoryArrayData.c + Type16/PlatformPhysicalMemoryArrayFunction.c + Type17/PlatformMemoryDeviceData.c + Type17/PlatformMemoryDeviceFunction.c + Type19/PlatformMemoryArrayMappedAddressData.c + Type19/PlatformMemoryArrayMappedAddressFunction.c Type24/PlatformHardwareSecurityData.c Type24/PlatformHardwareSecurityFunction.c Type38/PlatformIpmiDeviceData.c diff --git a/Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h b= /Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h index c425ed4431da..9b4f2c1e325c 100644 --- a/Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h +++ b/Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h @@ -6,6 +6,8 @@ =20 **/ =20 +#include + #ifndef AMPERE_CPU_LIB_H_ #define AMPERE_CPU_LIB_H_ =20 @@ -182,6 +184,28 @@ GetScpBuild ( UINT8 **ScpBuild ); =20 +/** + Get information of DIMM List. + + @param[out] DimmList Pointer contains information of DIMM List. +**/ +VOID +EFIAPI +GetDimmList ( + PLATFORM_DIMM_LIST **DimmList + ); + +/** + Get information of DRAM. + + @param[out] DramInfo Pointer contains information of DRAM. +**/ +VOID +EFIAPI +GetDramInfo ( + PLATFORM_DRAM_INFO **DramInfo + ); + /** Set the number of configured CPM per socket. =20 diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatfo= rmDxeDataTable.c b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Smbios= PlatformDxeDataTable.c index 84a4962d33fc..de5b9b83fb78 100644 --- a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxeDa= taTable.c +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxeDa= taTable.c @@ -23,9 +23,21 @@ SMBIOS_PLATFORM_DXE_TABLE_EXTERNS ( PlatformSystemSlot ) SMBIOS_PLATFORM_DXE_TABLE_EXTERNS ( - SMBIOS_TABLE_TYPE9, + SMBIOS_TABLE_TYPE11, PlatformOemString ) +SMBIOS_PLATFORM_DXE_TABLE_EXTERNS ( + SMBIOS_TABLE_TYPE16, + PlatformPhysicalMemoryArray + ) +SMBIOS_PLATFORM_DXE_TABLE_EXTERNS ( + SMBIOS_TABLE_TYPE17, + PlatformMemoryDevice + ) +SMBIOS_PLATFORM_DXE_TABLE_EXTERNS ( + SMBIOS_TABLE_TYPE19, + PlatformMemoryArrayMappedAddress + ) SMBIOS_PLATFORM_DXE_TABLE_EXTERNS ( SMBIOS_TABLE_TYPE24, PlatformHardwareSecurity @@ -52,6 +64,18 @@ SMBIOS_PLATFORM_DXE_DATA_TABLE mSmbiosPlatformDxeDataTab= le[] =3D { SMBIOS_PLATFORM_DXE_TABLE_ENTRY_DATA_AND_FUNCTION ( PlatformOemString ), + //Type16 + SMBIOS_PLATFORM_DXE_TABLE_ENTRY_DATA_AND_FUNCTION ( + PlatformPhysicalMemoryArray + ), + //Type17 + SMBIOS_PLATFORM_DXE_TABLE_ENTRY_DATA_AND_FUNCTION ( + PlatformMemoryDevice + ), + //Type19 + SMBIOS_PLATFORM_DXE_TABLE_ENTRY_DATA_AND_FUNCTION ( + PlatformMemoryArrayMappedAddress + ), // Type24 SMBIOS_PLATFORM_DXE_TABLE_ENTRY_DATA_AND_FUNCTION ( PlatformHardwareSecurity diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type16/Platf= ormPhysicalMemoryArrayData.c b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatfo= rmDxe/Type16/PlatformPhysicalMemoryArrayData.c new file mode 100644 index 000000000000..3c0e6a2ce9a0 --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type16/PlatformPhys= icalMemoryArrayData.c @@ -0,0 +1,48 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SmbiosPlatformDxe.h" + +// +// Define data for SMBIOS Type 16 Table. +// +SMBIOS_PLATFORM_DXE_TABLE_DATA (SMBIOS_TABLE_TYPE16, PlatformPhysicalMemor= yArray) =3D { + { // Table 1 + { // Header + EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // Type + sizeof (SMBIOS_TABLE_TYPE16), // Length + SMBIOS_HANDLE_PI_RESERVED, // Handle + }, + MemoryArrayLocationSystemBoard, // Location + MemoryArrayUseSystemMemory, // Use + MemoryErrorCorrectionMultiBitEcc, // Memory Error Correction + 0x80000000, // Maximum Capacity + 0xFFFE, // Memory Error Information H= andle + 0x10, // Number Of Memory Device + 0x40000000000ULL // Extended Maximum Capacity + }, + { // Null-terminated table + { + NULL_TERMINATED_TYPE, + 0, + 0 + }, + } +}; + +// +// Define string Tokens for additional strings. +// +SMBIOS_PLATFORM_DXE_STRING_TOKEN_DATA (PlatformPhysicalMemoryArray) =3D { + { // Table 1 + { // Tokens array + NULL_TERMINATED_TOKEN + }, + 0 // Size of Tokens array + } +}; diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type16/Platf= ormPhysicalMemoryArrayFunction.c b/Platform/Ampere/JadePkg/Drivers/SmbiosPl= atformDxe/Type16/PlatformPhysicalMemoryArrayFunction.c new file mode 100644 index 000000000000..772fa02cc256 --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type16/PlatformPhys= icalMemoryArrayFunction.c @@ -0,0 +1,44 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +#include "SmbiosPlatformDxe.h" + +/** + This function adds SMBIOS Table (Type 16) records. + + @param RecordData Pointer to SMBIOS Table with default = values. + @param Smbios SMBIOS protocol. + + @retval EFI_SUCCESS The SMBIOS Table was successfully add= ed. + @retval Other Failed to update the SMBIOS Table. + +**/ +SMBIOS_PLATFORM_DXE_TABLE_FUNCTION (PlatformPhysicalMemoryArray) { + UINT8 Index; + EFI_STATUS Status; + SMBIOS_TABLE_TYPE16 *InputData; + + for (Index =3D 0; Index < GetNumberOfSupportedSockets (); Index++) { + InputData =3D (SMBIOS_TABLE_TYPE16 *)RecordData; + + while (InputData->Hdr.Type !=3D NULL_TERMINATED_TYPE) { + Status =3D SmbiosPlatformDxeAddRecord ((UINT8 *)InputData, NULL); + if (EFI_ERROR (Status)) { + return Status; + } + + InputData++; + } + } + + return Status; +} diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/Platf= ormMemoryDeviceData.c b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/T= ype17/PlatformMemoryDeviceData.c new file mode 100644 index 000000000000..2b2c2fc3b4df --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/PlatformMemo= ryDeviceData.c @@ -0,0 +1,63 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SmbiosPlatformDxe.h" + +// +// Define data for SMBIOS Type 17 Table. +// +SMBIOS_PLATFORM_DXE_TABLE_DATA (SMBIOS_TABLE_TYPE17, PlatformMemoryDevice)= =3D { + { // Table 1 + { // Hdr + EFI_SMBIOS_TYPE_MEMORY_DEVICE, // Type + sizeof (SMBIOS_TABLE_TYPE17), // Length + SMBIOS_HANDLE_PI_RESERVED // Handle + }, + 0xFFFF, // Memory Array Handle + 0xFFFE, // Memory Error Information Handle + 72, // Total Width + 64, // Data Width + 0, // Size + 0x09, // Form Factor + 1, // Device Set + ADDITIONAL_STR_INDEX_1, // Device Locator + ADDITIONAL_STR_INDEX_2, // Bank Locator + MemoryTypeDdr4, // Memory Type + {}, // Type Detail + 0, // Speed + ADDITIONAL_STR_INDEX_3, // Manufacturer + ADDITIONAL_STR_INDEX_4, // Serial + ADDITIONAL_STR_INDEX_5, // Asset Tag + ADDITIONAL_STR_INDEX_6, // Part Number + 0, // Attributes + }, + { // Null-terminated table + { + NULL_TERMINATED_TYPE, + 0, + 0 + }, + } +}; + +// +// Define string Tokens for additional strings. +// +SMBIOS_PLATFORM_DXE_STRING_TOKEN_DATA (PlatformMemoryDevice) =3D { + { // Tab= le 1 + { // Tok= ens array + STRING_TOKEN (STR_PLATFORM_DXE_MEMORY_DEVICE_DEVICE_LOCATOR), + STRING_TOKEN (STR_PLATFORM_DXE_MEMORY_DEVICE_BANK_LOCATOR), + STRING_TOKEN (STR_PLATFORM_DXE_MEMORY_DEVICE_MANUFACTURER), + STRING_TOKEN (STR_PLATFORM_DXE_MEMORY_DEVICE_SERIAL_NUMBER), + STRING_TOKEN (STR_PLATFORM_DXE_MEMORY_DEVICE_ASSET_TAG), + STRING_TOKEN (STR_PLATFORM_DXE_MEMORY_DEVICE_PART_NUMBER) + }, + ADDITIONAL_STR_INDEX_6 // Siz= e of Tokens array + } +}; diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/Platf= ormMemoryDeviceFunction.c b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformD= xe/Type17/PlatformMemoryDeviceFunction.c new file mode 100644 index 000000000000..d15e4d40a01c --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/PlatformMemo= ryDeviceFunction.c @@ -0,0 +1,475 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include + +#include "SmbiosPlatformDxe.h" + +#define NULL_TERMINATED_ID 0xFF + +#define ASCII_SPACE_CHARACTER_CODE 0x20 +#define ASCII_TILDE_CHARACTER_CODE 0x7E + +#define SPD_PARITY_BIT_MASK 0x80 +#define SPD_MEMORY_TYPE_OFFSET 0x02 +#define SPD_CONTINUATION_CHARACTER 0x7F + +#define DDR2_SPD_MANUFACTURER_MEMORY_TYPE 0x08 +#define DDR2_SPD_MANUFACTURER_ID_CODE_LENGTH 8 +#define DDR2_SPD_MANUFACTURER_ID_CODE_OFFSET 64 +#define DDR2_SPD_MANUFACTURER_PART_NUMBER_OFFSET 73 +#define DDR2_SPD_MANUFACTURER_SERIAL_NUMBER_OFFSET 95 + +#define DDR3_SPD_MANUFACTURER_MEMORY_TYPE 0x0B +#define DDR3_SPD_MANUFACTURER_ID_BANK_OFFSET 117 +#define DDR3_SPD_MANUFACTURER_ID_CODE_OFFSET 118 +#define DDR3_SPD_MANUFACTURER_PART_NUMBER_OFFSET 128 +#define DDR3_SPD_MANUFACTURER_SERIAL_NUMBER_OFFSET 122 + +#define DDR4_SPD_MANUFACTURER_MEMORY_TYPE 0x0C +#define DDR4_SPD_MANUFACTURER_ID_BANK_OFFSET 320 +#define DDR4_SPD_MANUFACTURER_ID_CODE_OFFSET 321 +#define DDR4_SPD_MANUFACTURER_PART_NUMBER_OFFSET 329 +#define DDR4_SPD_MANUFACTURER_SERIAL_NUMBER_OFFSET 325 + +#define PRINTABLE_CHARACTER(Character) \ + (Character >=3D ASCII_SPACE_CHARACTER_CODE) && (Character <=3D ASCII_TIL= DE_CHARACTER_CODE) ? \ + Character : ASCII_SPACE_CHARACTER_CODE + +typedef enum { + DEVICE_LOCATOR_TOKEN_INDEX =3D 0, + BANK_LOCATOR_TOKEN_INDEX, + MANUFACTURER_TOKEN_INDEX, + SERIAL_NUMBER_TOKEN_INDEX, + ASSET_TAG_TOKEN_INDEX, + PART_NUMBER_TOKEN_INDEX +} MEMORY_DEVICE_TOKEN_INDEX; + +#pragma pack(1) +typedef struct { + UINT8 VendorId; + CHAR16 *ManufacturerString; +} JEDEC_MF_ID; +#pragma pack() + +JEDEC_MF_ID Bank0Table[] =3D { + { 0x01, L"AMD\0" }, + { 0x04, L"Fujitsu\0" }, + { 0x07, L"Hitachi\0" }, + { 0x89, L"Intel\0" }, + { 0x10, L"NEC\0" }, + { 0x97, L"Texas Instrument\0" }, + { 0x98, L"Toshiba\0" }, + { 0x1C, L"Mitsubishi\0" }, + { 0x1F, L"Atmel\0" }, + { 0x20, L"STMicroelectronics\0" }, + { 0xA4, L"IBM\0" }, + { 0x2C, L"Micron Technology\0" }, + { 0xAD, L"SK Hynix\0" }, + { 0xB0, L"Sharp\0" }, + { 0xB3, L"IDT\0" }, + { 0x3E, L"Oracle\0" }, + { 0xBF, L"SST\0" }, + { 0x40, L"ProMos/Mosel\0" }, + { 0xC1, L"Infineon\0" }, + { 0xC2, L"Macronix\0" }, + { 0x45, L"SanDisk\0" }, + { 0xCE, L"Samsung\0" }, + { 0xDA, L"Winbond\0" }, + { 0xE0, L"LG Semi\0" }, + { 0x62, L"Sanyo\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank1Table[] =3D { + { 0x98, L"Kingston\0" }, + { 0xBA, L"PNY\0" }, + { 0x4F, L"Transcend\0" }, + { 0x7A, L"Apacer\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank2Table[] =3D { + { 0x9E, L"Corsair\0" }, + { 0xFE, L"Elpida\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank3Table[] =3D { + { 0x0B, L"Nanya\0" }, + { 0x94, L"Mushkin\0" }, + { 0x25, L"Kingmax\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank4Table[] =3D { + { 0xB0, L"OCZ\0" }, + { 0xCB, L"A-DATA\0" }, + { 0xCD, L"G Skill\0" }, + { 0xEF, L"Team\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank5Table[] =3D { + { 0x02, L"Patriot\0" }, + { 0x9B, L"Crucial\0" }, + { 0x51, L"Qimonda\0" }, + { 0x57, L"AENEON\0" }, + { 0xF7, L"Avant\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank6Table[] =3D { + { 0x34, L"Super Talent\0" }, + { 0xD3, L"Silicon Power\0" }, + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID Bank7Table[] =3D { + { NULL_TERMINATED_ID, L"Undefined\0" } +}; + +JEDEC_MF_ID *ManufacturerJedecIdBankTable[] =3D { + Bank0Table, + Bank1Table, + Bank2Table, + Bank3Table, + Bank4Table, + Bank5Table, + Bank6Table, + Bank7Table +}; + +VOID +UpdateManufacturer ( + IN UINT8 *SpdData, + IN UINT16 ManufacturerToken + ) +{ + UINTN Index; + UINT8 VendorId; + UINT8 MemType; + UINT8 NumberOfJedecIdBankTables; + JEDEC_MF_ID *IdTblPtr =3D NULL; + + MemType =3D SpdData[SPD_MEMORY_TYPE_OFFSET]; + switch (MemType) { + case DDR2_SPD_MANUFACTURER_MEMORY_TYPE: + for (Index =3D 0; Index < DDR2_SPD_MANUFACTURER_ID_CODE_LENGTH; Index+= +) { + VendorId =3D SpdData[DDR2_SPD_MANUFACTURER_ID_CODE_OFFSET + Index]; + if (VendorId !=3D SPD_CONTINUATION_CHARACTER) { + break; + } + } + break; + + case DDR3_SPD_MANUFACTURER_MEMORY_TYPE: + Index =3D SpdData[DDR3_SPD_MANUFACTURER_ID_BANK_OFFSET] & (~SPD_PARITY= _BIT_MASK); // Remove parity bit + VendorId =3D SpdData[DDR4_SPD_MANUFACTURER_ID_CODE_OFFSET]; + break; + + case DDR4_SPD_MANUFACTURER_MEMORY_TYPE: + Index =3D SpdData[DDR4_SPD_MANUFACTURER_ID_BANK_OFFSET] & (~SPD_PARITY= _BIT_MASK); // Remove parity bit + VendorId =3D SpdData[DDR4_SPD_MANUFACTURER_ID_CODE_OFFSET]; + break; + + default: // Not supported + return; + } + + NumberOfJedecIdBankTables =3D ARRAY_SIZE (ManufacturerJedecIdBankTable) = - 1; // Exclude NULL-terminated table + if (Index > NumberOfJedecIdBankTables) { + Index =3D NumberOfJedecIdBankTables; + } + IdTblPtr =3D ManufacturerJedecIdBankTable[Index]; + + // Search in Manufacturer table and update vendor name accordingly in HI= I Database + while (IdTblPtr->VendorId !=3D NULL_TERMINATED_ID) { + if (IdTblPtr->VendorId =3D=3D VendorId) { + HiiSetString (mSmbiosPlatformDxeHiiHandle, ManufacturerToken, IdTblP= tr->ManufacturerString, NULL); + break; + } + IdTblPtr++; + } +} + +VOID +UpdateSerialNumber ( + IN UINT8 *SpdData, + IN UINT16 SerialNumberToken + ) +{ + UINT8 MemType; + UINTN Offset; + CHAR16 SerialNumberStr[SMBIOS_UNICODE_STRING_MAX_LENGTH]; + + MemType =3D SpdData[SPD_MEMORY_TYPE_OFFSET]; + switch (MemType) { + case DDR2_SPD_MANUFACTURER_MEMORY_TYPE: + Offset =3D DDR2_SPD_MANUFACTURER_SERIAL_NUMBER_OFFSET; + break; + + case DDR3_SPD_MANUFACTURER_MEMORY_TYPE: + Offset =3D DDR3_SPD_MANUFACTURER_SERIAL_NUMBER_OFFSET; + break; + + case DDR4_SPD_MANUFACTURER_MEMORY_TYPE: + Offset =3D DDR4_SPD_MANUFACTURER_SERIAL_NUMBER_OFFSET; + break; + + default: // Not supported + return; + } + + UnicodeSPrint ( + SerialNumberStr, + sizeof (SerialNumberStr), + L"%02X%02X%02X%02X", + SpdData[Offset], + SpdData[Offset + 1], + SpdData[Offset + 2], + SpdData[Offset + 3] + ); + HiiSetString (mSmbiosPlatformDxeHiiHandle, SerialNumberToken, SerialNumb= erStr, NULL); +} + +VOID +UpdatePartNumber ( + IN UINT8 *SpdData, + IN UINT16 PartNumberToken + ) +{ + UINT8 MemType; + UINTN Offset; + CHAR16 PartNumberStr[SMBIOS_UNICODE_STRING_MAX_LENGTH]; + + MemType =3D SpdData[SPD_MEMORY_TYPE_OFFSET]; + switch (MemType) { + case DDR2_SPD_MANUFACTURER_MEMORY_TYPE: + Offset =3D DDR2_SPD_MANUFACTURER_PART_NUMBER_OFFSET; + break; + + case DDR3_SPD_MANUFACTURER_MEMORY_TYPE: + Offset =3D DDR3_SPD_MANUFACTURER_PART_NUMBER_OFFSET; + break; + + case DDR4_SPD_MANUFACTURER_MEMORY_TYPE: + Offset =3D DDR4_SPD_MANUFACTURER_PART_NUMBER_OFFSET; + break; + + default: // Not supported + return; + } + + UnicodeSPrint ( + PartNumberStr, + sizeof (PartNumberStr), + L"%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c", + PRINTABLE_CHARACTER (SpdData[Offset]), + PRINTABLE_CHARACTER (SpdData[Offset + 1]), + PRINTABLE_CHARACTER (SpdData[Offset + 2]), + PRINTABLE_CHARACTER (SpdData[Offset + 3]), + PRINTABLE_CHARACTER (SpdData[Offset + 4]), + PRINTABLE_CHARACTER (SpdData[Offset + 5]), + PRINTABLE_CHARACTER (SpdData[Offset + 6]), + PRINTABLE_CHARACTER (SpdData[Offset + 7]), + PRINTABLE_CHARACTER (SpdData[Offset + 8]), + PRINTABLE_CHARACTER (SpdData[Offset + 9]), + PRINTABLE_CHARACTER (SpdData[Offset + 10]), + PRINTABLE_CHARACTER (SpdData[Offset + 11]), + PRINTABLE_CHARACTER (SpdData[Offset + 12]), + PRINTABLE_CHARACTER (SpdData[Offset + 13]), + PRINTABLE_CHARACTER (SpdData[Offset + 14]), + PRINTABLE_CHARACTER (SpdData[Offset + 15]), + PRINTABLE_CHARACTER (SpdData[Offset + 16]), + PRINTABLE_CHARACTER (SpdData[Offset + 17]) + ); + HiiSetString (mSmbiosPlatformDxeHiiHandle, PartNumberToken, PartNumberSt= r, NULL); +} + +/** + This function adds SMBIOS Table (Type 17) records. + + @param RecordData Pointer to SMBIOS Table with default = values. + @param Smbios SMBIOS protocol. + + @retval EFI_SUCCESS The SMBIOS Table was successfully add= ed. + @retval Other Failed to update the SMBIOS Table. + +**/ +SMBIOS_PLATFORM_DXE_TABLE_FUNCTION (PlatformMemoryDevice) { + UINT8 Index; + UINT8 SlotIndex; + UINTN HandleCount; + UINTN MemorySize; + UINT16 *HandleArray; + CHAR16 UnicodeStr[SMBIOS_UNICODE_STRING_MAX_LENGTH]; + EFI_STATUS Status; + SMBIOS_HANDLE MemoryArrayHandle; + PLATFORM_DIMM *Dimm; + STR_TOKEN_INFO *InputStrToken; + PLATFORM_DIMM_LIST *DimmList; + PLATFORM_DRAM_INFO *DramInfo; + SMBIOS_TABLE_TYPE17 *InputData; + SMBIOS_TABLE_TYPE17 *Type17Record; + + HandleCount =3D 0; + HandleArray =3D NULL; + + GetDimmList (&DimmList); + if (DimmList =3D=3D NULL) { + DEBUG (( + DEBUG_ERROR, + "[%a]:[%dL] Failed to get Dimm List\n", + __func__, + __LINE__ + )); + return EFI_NOT_FOUND; + } + + GetDramInfo (&DramInfo); + if (DramInfo =3D=3D NULL) { + DEBUG (( + DEBUG_ERROR, + "[%a]:[%dL] Failed to get DRAM Information\n", + __func__, + __LINE__ + )); + return EFI_NOT_FOUND; + } + + SmbiosPlatformDxeGetLinkTypeHandle ( + EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, + &HandleArray, + &HandleCount + ); + if (HandleArray =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + if (HandleCount !=3D GetNumberOfSupportedSockets ()) { + DEBUG (( + DEBUG_ERROR, + "[%a]:[%dL] Failed to get Memory Array Handle\n", + __func__, + __LINE__ + )); + FreePool (HandleArray); + return EFI_NOT_FOUND; + } + + for (Index =3D 0; Index < GetNumberOfSupportedSockets (); Index++) { + InputData =3D (SMBIOS_TABLE_TYPE17 *)RecordData; + InputStrToken =3D (STR_TOKEN_INFO *)StrToken; + MemoryArrayHandle =3D HandleArray[Index]; + + while (InputData->Hdr.Type !=3D NULL_TERMINATED_TYPE) { + for (SlotIndex =3D 0; SlotIndex < DimmList->BoardDimmSlots; SlotInde= x++) { + // + // Prepare additional strings for SMBIOS Table. + // + Dimm =3D &DimmList->Dimm[SlotIndex]; + if (Dimm->NodeId !=3D Index) { + continue; + } + + Status =3D SmbiosPlatformDxeSaveHiiDefaultString (InputStrToken); + if (EFI_ERROR (Status)) { + FreePool (HandleArray); + return Status; + } + if (Dimm->Info.DimmStatus =3D=3D DIMM_INSTALLED_OPERATIONAL) { + UpdateManufacturer (Dimm->SpdData.Data, InputStrToken->TokenArra= y[MANUFACTURER_TOKEN_INDEX]); + UpdateSerialNumber (Dimm->SpdData.Data, InputStrToken->TokenArra= y[SERIAL_NUMBER_TOKEN_INDEX]); + UpdatePartNumber (Dimm->SpdData.Data, InputStrToken->TokenArray[= PART_NUMBER_TOKEN_INDEX]); + } + UnicodeSPrint (UnicodeStr, sizeof (UnicodeStr), L"Socket %d DIMM %= d", Index, SlotIndex); + HiiSetString (mSmbiosPlatformDxeHiiHandle, InputStrToken->TokenArr= ay[DEVICE_LOCATOR_TOKEN_INDEX], UnicodeStr, NULL); + UnicodeSPrint (UnicodeStr, sizeof (UnicodeStr), L"Bank %d", SlotIn= dex); + HiiSetString (mSmbiosPlatformDxeHiiHandle, InputStrToken->TokenArr= ay[BANK_LOCATOR_TOKEN_INDEX], UnicodeStr, NULL); + UnicodeSPrint (UnicodeStr, sizeof (UnicodeStr), L"Array %d Asset T= ag %d", Index, SlotIndex); + HiiSetString (mSmbiosPlatformDxeHiiHandle, InputStrToken->TokenArr= ay[ASSET_TAG_TOKEN_INDEX], UnicodeStr, NULL); + + // + // Create Table and fill up information. + // + SmbiosPlatformDxeCreateTable ( + (VOID *)&Type17Record, + (VOID *)&InputData, + sizeof (SMBIOS_TABLE_TYPE17), + InputStrToken + ); + if (Type17Record =3D=3D NULL) { + FreePool (HandleArray); + return EFI_OUT_OF_RESOURCES; + } + + if (Dimm->Info.DimmStatus =3D=3D DIMM_INSTALLED_OPERATIONAL) { + MemorySize =3D Dimm->Info.DimmSize * 1024; + if (MemorySize >=3D 0x7FFF) { + Type17Record->Size =3D 0x7FFF; + Type17Record->ExtendedSize =3D MemorySize; + } else { + Type17Record->Size =3D (UINT16)MemorySize; + Type17Record->ExtendedSize =3D 0; + } + + Type17Record->MemoryType =3D 0x1A; // DDR4 + Type17Record->Speed =3D (UINT16)DramInfo->M= axSpeed; + Type17Record->ConfiguredMemoryClockSpeed =3D (UINT16)DramInfo->M= axSpeed; + Type17Record->Attributes =3D Dimm->Info.DimmNrRa= nk & 0x0F; + Type17Record->ConfiguredVoltage =3D 1200; + Type17Record->MinimumVoltage =3D 1140; + Type17Record->MaximumVoltage =3D 1260; + Type17Record->DeviceSet =3D 0; // None + + if (Dimm->Info.DimmType =3D=3D UDIMM || Dimm->Info.DimmType =3D= =3D SODIMM) { + Type17Record->TypeDetail.Unbuffered =3D 1; // BIT 14: unregist= ered + } else if (Dimm->Info.DimmType =3D=3D RDIMM + || Dimm->Info.DimmType =3D=3D LRDIMM + || Dimm->Info.DimmType =3D=3D RSODIMM) + { + Type17Record->TypeDetail.Registered =3D 1; // BIT 13: register= ed + } + /* FIXME: Determine if need to set technology to NVDIMM-* when s= upported */ + Type17Record->MemoryTechnology =3D 0x3; // DRAM + } + // Update Type 16 handle + Type17Record->MemoryArrayHandle =3D MemoryArrayHandle; + + // + // Add Table record and free pool. + // + Status =3D SmbiosPlatformDxeAddRecord ((UINT8 *)Type17Record, NULL= ); + if (EFI_ERROR (Status)) { + FreePool (HandleArray); + FreePool (Type17Record); + return Status; + } + + FreePool (Type17Record); + Status =3D SmbiosPlatformDxeRestoreHiiDefaultString (InputStrToken= ); + if (EFI_ERROR (Status)) { + FreePool (HandleArray); + return Status; + } + } + + InputData++; + InputStrToken++; + } + } + FreePool (HandleArray); + + return Status; +} diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type19/Platf= ormMemoryArrayMappedAddressData.c b/Platform/Ampere/JadePkg/Drivers/SmbiosP= latformDxe/Type19/PlatformMemoryArrayMappedAddressData.c new file mode 100644 index 000000000000..d14099ae8852 --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type19/PlatformMemo= ryArrayMappedAddressData.c @@ -0,0 +1,47 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SmbiosPlatformDxe.h" + +// +// Define data for SMBIOS Type 19 Table. +// +SMBIOS_PLATFORM_DXE_TABLE_DATA (SMBIOS_TABLE_TYPE19, PlatformMemoryArrayMa= ppedAddress) =3D { + { // Table 1 + { // Header + EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, // Type + sizeof (SMBIOS_TABLE_TYPE19), // Length + SMBIOS_HANDLE_PI_RESERVED // Handle + }, + 0xFFFFFFFF, // Starting Address + 0xFFFFFFFF, // Ending Address + 0xFFFF, // Memory Array Handle + 1, // Partition Width + 0x0, // Extended Starting A= ddress + 0x0 // Extended Ending Add= ress + }, + { // Null-terminated tab= le + { + NULL_TERMINATED_TYPE, + 0, + 0 + }, + } +}; + +// +// Define string Tokens for additional strings. +// +SMBIOS_PLATFORM_DXE_STRING_TOKEN_DATA (PlatformMemoryArrayMappedAddress) = =3D { + { // Table 1 + { // Tokens array + NULL_TERMINATED_TOKEN + }, + 0 // Size of Tokens array + } +}; diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type19/Platf= ormMemoryArrayMappedAddressFunction.c b/Platform/Ampere/JadePkg/Drivers/Smb= iosPlatformDxe/Type19/PlatformMemoryArrayMappedAddressFunction.c new file mode 100644 index 000000000000..c57eaef26bf5 --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type19/PlatformMemo= ryArrayMappedAddressFunction.c @@ -0,0 +1,150 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include + +#include "SmbiosPlatformDxe.h" + +/** + This function adds SMBIOS Table (Type 19) records. + + @param RecordData Pointer to SMBIOS Table with default = values. + @param Smbios SMBIOS protocol. + + @retval EFI_SUCCESS The SMBIOS Table was successfully add= ed. + @retval Other Failed to update the SMBIOS Table. + +**/ +SMBIOS_PLATFORM_DXE_TABLE_FUNCTION (PlatformMemoryArrayMappedAddress) { + UINT8 Index; + UINT8 SlotIndex; + UINT8 MemRegionIndex; + UINTN HandleCount; + UINTN MemorySize; + UINT16 *HandleArray; + EFI_STATUS Status; + PLATFORM_DIMM *Dimm; + STR_TOKEN_INFO *InputStrToken; + PLATFORM_DIMM_LIST *DimmList; + PLATFORM_DRAM_INFO *DramInfo; + SMBIOS_TABLE_TYPE19 *InputData; + SMBIOS_TABLE_TYPE19 *Type19Record; + + HandleCount =3D 0; + HandleArray =3D NULL; + + GetDimmList (&DimmList); + if (DimmList =3D=3D NULL) { + DEBUG (( + DEBUG_ERROR, + "[%a]:[%dL] Failed to get Dimm List\n", + __func__, + __LINE__ + )); + return EFI_NOT_FOUND; + } + + GetDramInfo (&DramInfo); + if (DramInfo =3D=3D NULL) { + DEBUG (( + DEBUG_ERROR, + "[%a]:[%dL] Failed to get DRAM Information\n", + __func__, + __LINE__ + )); + return EFI_NOT_FOUND; + } + + SmbiosPlatformDxeGetLinkTypeHandle ( + EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, + &HandleArray, + &HandleCount + ); + if (HandleArray =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + if (HandleCount !=3D GetNumberOfSupportedSockets ()) { + DEBUG (( + DEBUG_ERROR, + "[%a]:[%dL] Failed to get Memory Array Handle\n", + __func__, + __LINE__ + )); + FreePool (HandleArray); + return EFI_NOT_FOUND; + } + + for (Index =3D 0; Index < GetNumberOfSupportedSockets (); Index++) { + InputData =3D (SMBIOS_TABLE_TYPE19 *)RecordData; + InputStrToken =3D (STR_TOKEN_INFO *)StrToken; + while (InputData->Hdr.Type !=3D NULL_TERMINATED_TYPE) { + // + // Calculate memory size + // + for (SlotIndex =3D 0; SlotIndex < DimmList->BoardDimmSlots; SlotInde= x++) { + Dimm =3D &DimmList->Dimm[SlotIndex]; + if (Dimm->NodeId !=3D Index) { + continue; + } + + if (Dimm->Info.DimmStatus =3D=3D DIMM_INSTALLED_OPERATIONAL) { + MemorySize =3D Dimm->Info.DimmSize * 1024; + } + } + + // + // Create Table and fill up information + // + for (MemRegionIndex =3D 0; MemRegionIndex < DramInfo->NumRegion; Mem= RegionIndex++) { + SmbiosPlatformDxeCreateTable ( + (VOID *)&Type19Record, + (VOID *)&InputData, + sizeof (SMBIOS_TABLE_TYPE19), + InputStrToken + ); + if (Type19Record =3D=3D NULL) { + FreePool (HandleArray); + return EFI_OUT_OF_RESOURCES; + } + + if (DramInfo->NvdRegion[MemRegionIndex] > 0 + || DramInfo->Socket[MemRegionIndex] !=3D Index) + { + continue; + } + + Type19Record->ExtendedStartingAddress =3D DramInfo->Base[MemRegion= Index]; + Type19Record->ExtendedEndingAddress =3D DramInfo->Base[MemRegion= Index] + + DramInfo->Size[MemRegionIn= dex] -1; + if (MemorySize !=3D 0) { + Type19Record->PartitionWidth =3D (DramInfo->Size[MemRegionIndex]= - 1) / MemorySize + 1; + } + Type19Record->MemoryArrayHandle =3D HandleArray[Index]; + + Status =3D SmbiosPlatformDxeAddRecord ((UINT8 *)Type19Record, NULL= ); + if (EFI_ERROR (Status)) { + FreePool (HandleArray); + FreePool (Type19Record); + return Status; + } + + FreePool (Type19Record); + } + + InputData++; + InputStrToken++; + } + } + FreePool (HandleArray); + + return Status; +} diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLi= bCommon.c b/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib= Common.c index 853ab5543f11..0d72853e3d5f 100644 --- a/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLibCommon= .c +++ b/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLibCommon= .c @@ -555,6 +555,48 @@ GetScpBuild ( } } =20 +/** + Get information of DIMM List. + + @param[out] DimmList Pointer contains information of DIMM List. +**/ +VOID +EFIAPI +GetDimmList ( + PLATFORM_DIMM_LIST **DimmList + ) +{ + PLATFORM_INFO_HOB *PlatformHob; + + PlatformHob =3D GetPlatformHob (); + if (PlatformHob !=3D NULL) { + *DimmList =3D &PlatformHob->DimmList; + } else { + *DimmList =3D NULL; + } +} + +/** + Get information of DRAM. + + @param[out] DramInfo Pointer contains information of DRAM. +**/ +VOID +EFIAPI +GetDramInfo ( + PLATFORM_DRAM_INFO **DramInfo + ) +{ + PLATFORM_INFO_HOB *PlatformHob; + + PlatformHob =3D GetPlatformHob (); + if (PlatformHob !=3D NULL) { + *DramInfo =3D &PlatformHob->DramInfo; + } else { + *DramInfo =3D NULL; + } +} + /** Set the number of configured CPM per socket. =20 diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatfo= rmDxeStrings.uni b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Smbios= PlatformDxeStrings.uni index c8176e31ab45..83a76202d614 100644 --- a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxeSt= rings.uni +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxeSt= rings.uni @@ -18,4 +18,5 @@ #include "Type08/PlatformPortConnector.uni" #include "Type09/PlatformSystemSlot.uni" #include "Type11/PlatformOemString.uni" +#include "Type17/PlatformMemoryDevice.uni" #include "Type41/PlatformOnboardDevicesExtended.uni" diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/Platf= ormMemoryDevice.uni b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Typ= e17/PlatformMemoryDevice.uni new file mode 100644 index 000000000000..012bc241f78a --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/SmbiosPlatformDxe/Type17/PlatformMemo= ryDevice.uni @@ -0,0 +1,16 @@ +/** @file + + Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +/=3D# + +#string STR_PLATFORM_DXE_MEMORY_DEVICE_DEVICE_LOCATOR #language en-US "N= ot set" +#string STR_PLATFORM_DXE_MEMORY_DEVICE_BANK_LOCATOR #language en-US "N= ot set" +#string STR_PLATFORM_DXE_MEMORY_DEVICE_MANUFACTURER #language en-US "N= ot set" +#string STR_PLATFORM_DXE_MEMORY_DEVICE_SERIAL_NUMBER #language en-US "N= ot set" +#string STR_PLATFORM_DXE_MEMORY_DEVICE_ASSET_TAG #language en-US "N= ot set" +#string STR_PLATFORM_DXE_MEMORY_DEVICE_PART_NUMBER #language en-US "N= ot set" --=20 2.39.0